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Merge tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

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Merge "Samsung drivers/soc update for v4.8, part 3" into next/drivers:

1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.

* tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: pmu: Constify arrays with PMU data
  memory: samsung: exynos-srom: Fix wrong count of registers
This commit is contained in:
Arnd Bergmann
2016-07-14 15:26:44 +02:00
parent f1844aca29 aec6341e2a
commit f8c6d88b2c
3 changed files with 3 additions and 3 deletions
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2
drivers/memory/samsung/exynos-srom.c
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@@ -134,7 +134,7 @@ static int exynos_srom_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, srom); platform_set_drvdata(pdev, srom);
srom->reg_offset = exynos_srom_alloc_reg_dump(exynos_srom_offsets, srom->reg_offset = exynos_srom_alloc_reg_dump(exynos_srom_offsets,
sizeof(exynos_srom_offsets)); ARRAY_SIZE(exynos_srom_offsets));
if (!srom->reg_offset) { if (!srom->reg_offset) {
iounmap(srom->reg_base); iounmap(srom->reg_base);
return -ENOMEM; return -ENOMEM;

2
drivers/soc/samsung/exynos3250-pmu.c
View File

@@ -14,7 +14,7 @@
#include "exynos-pmu.h" #include "exynos-pmu.h"
static struct exynos_pmu_conf exynos3250_pmu_config[] = { static const struct exynos_pmu_conf exynos3250_pmu_config[] = {
/* { .offset = offset, .val = { AFTR, W-AFTR, SLEEP } */ /* { .offset = offset, .val = { AFTR, W-AFTR, SLEEP } */
{ EXYNOS3_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} }, { EXYNOS3_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
{ EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} }, { EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },

2
drivers/soc/samsung/exynos5420-pmu.c
View File

@@ -17,7 +17,7 @@
#include "exynos-pmu.h" #include "exynos-pmu.h"
static struct exynos_pmu_conf exynos5420_pmu_config[] = { static const struct exynos_pmu_conf exynos5420_pmu_config[] = {
/* { .offset = offset, .val = { AFTR, LPA, SLEEP } */ /* { .offset = offset, .val = { AFTR, LPA, SLEEP } */
{ EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} }, { EXYNOS5_ARM_CORE0_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
{ EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} }, { EXYNOS5_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },