drm/i915: Kill duplicated cdclk readout code from i2c
We have a slightly different way of readoing out the cdclk in gmbus_set_freq(). Kill that and just call .get_display_clock_speed(). Also need to remove the GMBUSFREQ update from intel_i2c_reset() since that gets called way too early. Let's do it in intel_modeset_init_hw() instead, and also pull the initial vlv_cdclk_freq update there from init_clock gating. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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committed by
Daniel Vetter

parent
7d007f4059
commit
f8bf63fdcb
@@ -34,11 +34,6 @@
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#include <drm/i915_drm.h>
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#include "i915_drv.h"
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enum disp_clk {
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CDCLK,
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CZCLK
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};
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struct gmbus_port {
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const char *name;
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int reg;
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@@ -63,60 +58,11 @@ to_intel_gmbus(struct i2c_adapter *i2c)
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return container_of(i2c, struct intel_gmbus, adapter);
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}
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static int get_disp_clk_div(struct drm_i915_private *dev_priv,
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enum disp_clk clk)
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{
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u32 reg_val;
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int clk_ratio;
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reg_val = I915_READ(CZCLK_CDCLK_FREQ_RATIO);
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if (clk == CDCLK)
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clk_ratio =
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((reg_val & CDCLK_FREQ_MASK) >> CDCLK_FREQ_SHIFT) + 1;
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else
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clk_ratio = (reg_val & CZCLK_FREQ_MASK) + 1;
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return clk_ratio;
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}
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static void gmbus_set_freq(struct drm_i915_private *dev_priv)
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{
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int vco, gmbus_freq = 0, cdclk_div;
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BUG_ON(!IS_VALLEYVIEW(dev_priv->dev));
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vco = valleyview_get_vco(dev_priv) / 1000;
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/* Get the CDCLK divide ratio */
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cdclk_div = get_disp_clk_div(dev_priv, CDCLK);
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/*
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* Program the gmbus_freq based on the cdclk frequency.
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* BSpec erroneously claims we should aim for 4MHz, but
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* in fact 1MHz is the correct frequency.
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*/
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if (cdclk_div)
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gmbus_freq = (vco << 1) / cdclk_div;
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if (WARN_ON(gmbus_freq == 0))
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return;
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I915_WRITE(GMBUSFREQ_VLV, gmbus_freq);
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}
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void
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intel_i2c_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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/*
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* In BIOS-less system, program the correct gmbus frequency
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* before reading edid.
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*/
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if (IS_VALLEYVIEW(dev))
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gmbus_set_freq(dev_priv);
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I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0);
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I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0);
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}
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