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MIPS: Alchemy: Improved DB1550 support, with audio and serial busses.

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Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
2011-11-10 12:06:16 +00:00
committed by Ralf Baechle
parent 64cd04d0cf
commit f869d42e58
10 changed files with 763 additions and 176 deletions
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2
arch/mips/include/asm/mach-db1x00/bcsr.h
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@@ -163,7 +163,7 @@ enum bcsr_whoami_boards {
#define BCSR_BOARD_GPIO200RST 0x0400
#define BCSR_BOARD_PCICLKOUT 0x0800
#define BCSR_BOARD_PCICFG 0x1000
#define BCSR_BOARD_SPISEL 0x4000 /* PB/DB1550 */
#define BCSR_BOARD_SPISEL 0x2000 /* PB/DB1550 */
#define BCSR_BOARD_SD0WP 0x4000 /* DB1100 */
#define BCSR_BOARD_SD1WP 0x8000 /* DB1100 */

16
arch/mips/include/asm/mach-db1x00/db1x00.h
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@@ -29,22 +29,6 @@
#include <asm/mach-au1x00/au1xxx_psc.h>
#ifdef CONFIG_MIPS_DB1550
#define DBDMA_AC97_TX_CHAN AU1550_DSCR_CMD0_PSC1_TX
#define DBDMA_AC97_RX_CHAN AU1550_DSCR_CMD0_PSC1_RX
#define DBDMA_I2S_TX_CHAN AU1550_DSCR_CMD0_PSC3_TX
#define DBDMA_I2S_RX_CHAN AU1550_DSCR_CMD0_PSC3_RX
#define SPI_PSC_BASE AU1550_PSC0_PHYS_ADDR
#define AC97_PSC_BASE AU1550_PSC1_PHYS_ADDR
#define SMBUS_PSC_BASE AU1550_PSC2_PHYS_ADDR
#define I2S_PSC_BASE AU1550_PSC3_PHYS_ADDR
#define NAND_PHYS_ADDR 0x20000000
#endif
/*
* NAND defines
*