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MIPS: Loongson-3: Add some unaligned instructions emulation

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1, Add unaligned gslq, gssq, gslqc1, gssqc1 emulation;
2, Add unaligned gsl{h, w, d}x, gss{h, w, d}x emulation;
3, Add unaligned gslwxc1, gsswxc1, gsldxc1, gssdxc1 emulation.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Pei Huang <huangpei@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Huacai Chen
2020-04-24 18:56:46 +08:00
committed by Thomas Bogendoerfer
parent d339cd02b8
commit f83e4f9896
2 changed files with 314 additions and 1 deletions
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26
arch/mips/include/uapi/asm/inst.h
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@@ -988,6 +988,30 @@ struct mm16_r5_format { /* Load/store from stack pointer format */
;))))
};
/*
* Loongson-3 overridden COP2 instruction formats (32-bit length)
*/
struct loongson3_lswc2_format { /* Loongson-3 overridden lwc2/swc2 Load/Store format */
__BITFIELD_FIELD(unsigned int opcode : 6,
__BITFIELD_FIELD(unsigned int base : 5,
__BITFIELD_FIELD(unsigned int rt : 5,
__BITFIELD_FIELD(unsigned int fr : 1,
__BITFIELD_FIELD(unsigned int offset : 9,
__BITFIELD_FIELD(unsigned int ls : 1,
__BITFIELD_FIELD(unsigned int rq : 5,
;)))))))
};
struct loongson3_lsdc2_format { /* Loongson-3 overridden ldc2/sdc2 Load/Store format */
__BITFIELD_FIELD(unsigned int opcode : 6,
__BITFIELD_FIELD(unsigned int base : 5,
__BITFIELD_FIELD(unsigned int rt : 5,
__BITFIELD_FIELD(unsigned int index : 5,
__BITFIELD_FIELD(unsigned int offset : 8,
__BITFIELD_FIELD(unsigned int opcode1 : 3,
;))))))
};
/*
* MIPS16e instruction formats (16-bit length)
*/
@@ -1088,6 +1112,8 @@ union mips_instruction {
struct mm16_rb_format mm16_rb_format;
struct mm16_r3_format mm16_r3_format;
struct mm16_r5_format mm16_r5_format;
struct loongson3_lswc2_format loongson3_lswc2_format;
struct loongson3_lsdc2_format loongson3_lsdc2_format;
};
union mips16e_instruction {