[SPARC64]: Proper multi-core scheduling support.
The scheduling domain hierarchy is: all cpus --> cpus that share an instruction cache --> cpus that share an integer execution unit Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
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commit
f78eae2e6f
@@ -51,6 +51,8 @@ cpumask_t cpu_online_map __read_mostly = CPU_MASK_NONE;
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cpumask_t phys_cpu_present_map __read_mostly = CPU_MASK_NONE;
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cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly =
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{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
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cpumask_t cpu_core_map[NR_CPUS] __read_mostly =
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{ [0 ... NR_CPUS-1] = CPU_MASK_NONE };
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static cpumask_t smp_commenced_mask;
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static cpumask_t cpu_callout_map;
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@@ -1217,13 +1219,28 @@ void __devinit smp_fill_in_sib_core_maps(void)
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unsigned int j;
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if (cpu_data(i).core_id == 0) {
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cpu_set(i, cpu_sibling_map[i]);
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cpu_set(i, cpu_core_map[i]);
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continue;
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}
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for_each_possible_cpu(j) {
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if (cpu_data(i).core_id ==
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cpu_data(j).core_id)
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cpu_set(j, cpu_core_map[i]);
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}
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}
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for_each_possible_cpu(i) {
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unsigned int j;
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if (cpu_data(i).proc_id == -1) {
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cpu_set(i, cpu_sibling_map[i]);
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continue;
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}
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for_each_possible_cpu(j) {
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if (cpu_data(i).proc_id ==
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cpu_data(j).proc_id)
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cpu_set(j, cpu_sibling_map[i]);
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}
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}
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