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clk: iproc: Split off dig_filter

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The PLL loop filter/gain can be located in a separate register on some
SoCs.  Split these off into a separate variable, so that an offset can
be added if necessary.  Also, make the necessary modifications to the
Cygnus and NSP drivers for this change.

Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Jon Mason
2015-10-15 15:48:29 -04:00
committed by Stephen Boyd
parent 7968d24107
commit f713c6bf32
4 changed files with 38 additions and 17 deletions
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10
drivers/clk/bcm/clk-iproc.h
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@@ -94,12 +94,19 @@ struct iproc_pll_aon_pwr_ctrl {
};
/*
* Control of the PLL reset, with Ki, Kp, and Ka parameters
* Control of the PLL reset
*/
struct iproc_pll_reset_ctrl {
unsigned int offset;
unsigned int reset_shift;
unsigned int p_reset_shift;
};
/*
* Control of the Ki, Kp, and Ka parameters
*/
struct iproc_pll_dig_filter_ctrl {
unsigned int offset;
unsigned int ki_shift;
unsigned int ki_width;
unsigned int kp_shift;
@@ -129,6 +136,7 @@ struct iproc_pll_ctrl {
struct iproc_pll_aon_pwr_ctrl aon;
struct iproc_asiu_gate asiu;
struct iproc_pll_reset_ctrl reset;
struct iproc_pll_dig_filter_ctrl dig_filter;
struct iproc_pll_sw_ctrl sw_ctrl;
struct iproc_clk_reg_op ndiv_int;
struct iproc_clk_reg_op ndiv_frac;