ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9
For supporting single image on all Tegra series, we need to skip some HW support code for Cortex-A9 only. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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committed by
Stephen Warren

parent
4b3e2edacf
commit
f6d06f3366
@@ -106,9 +106,11 @@ ENTRY(tegra_shut_off_mmu)
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isb
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#ifdef CONFIG_CACHE_L2X0
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/* Disable L2 cache */
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mov32 r4, TEGRA_ARM_PERIF_BASE + 0x3000
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mov r5, #0
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str r5, [r4, #L2X0_CTRL]
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check_cpu_part_num 0xc09, r9, r10
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movweq r4, #:lower16:(TEGRA_ARM_PERIF_BASE + 0x3000)
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movteq r4, #:upper16:(TEGRA_ARM_PERIF_BASE + 0x3000)
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moveq r5, #0
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streq r5, [r4, #L2X0_CTRL]
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#endif
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mov pc, r0
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ENDPROC(tegra_shut_off_mmu)
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