Merge tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull IOMMU Updates from Joerg Roedel: "Besides some fixes and cleanups in the code there are three more important changes to point out this time: * New IOMMU driver for the ARM SHMOBILE platform * An IOMMU-API extension for non-paging IOMMUs (required for upcoming PAMU driver) * Rework of the way the Tegra IOMMU driver accesses its registetrs - register windows are easier to extend now. There are also a few changes to non-iommu code, but that is acked by the respective maintainers." * tag 'iommu-updates-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (23 commits) iommu/tegra: assume CONFIG_OF in SMMU driver iommu/tegra: assume CONFIG_OF in gart driver iommu/amd: Remove redundant NULL check before dma_ops_domain_free(). iommu/amd: Initialize device table after dma_ops iommu/vt-d: Zero out allocated memory in dmar_enable_qi iommu/tegra: smmu: Fix incorrect mask for regbase iommu/exynos: Make exynos_sysmmu_disable static ARM: mach-shmobile: r8a7740: Add IPMMU device ARM: mach-shmobile: sh73a0: Add IPMMU device ARM: mach-shmobile: sh7372: Add IPMMU device iommu/shmobile: Add iommu driver for Renesas IPMMU modules iommu: Add DOMAIN_ATTR_WINDOWS domain attribute iommu: Add domain window handling functions iommu: Implement DOMAIN_ATTR_PAGING attribute iommu: Check for valid pgsize_bitmap in iommu_map/unmap iommu: Make sure DOMAIN_ATTR_MAX is really the maximum iommu/tegra: smmu: Change SMMU's dependency on ARCH_TEGRA iommu/tegra: smmu: Use helper function to check for valid register offset iommu/tegra: smmu: Support variable MMIO ranges/blocks iommu/tegra: Add missing spinlock initialization ...
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@@ -58,8 +58,10 @@ struct iommu_domain {
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#define IOMMU_CAP_INTR_REMAP 0x2 /* isolates device intrs */
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enum iommu_attr {
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DOMAIN_ATTR_MAX,
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DOMAIN_ATTR_GEOMETRY,
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DOMAIN_ATTR_PAGING,
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DOMAIN_ATTR_WINDOWS,
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DOMAIN_ATTR_MAX,
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};
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#ifdef CONFIG_IOMMU_API
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@@ -100,6 +102,16 @@ struct iommu_ops {
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enum iommu_attr attr, void *data);
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int (*domain_set_attr)(struct iommu_domain *domain,
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enum iommu_attr attr, void *data);
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/* Window handling functions */
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int (*domain_window_enable)(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t paddr, u64 size);
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void (*domain_window_disable)(struct iommu_domain *domain, u32 wnd_nr);
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/* Set the numer of window per domain */
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int (*domain_set_windows)(struct iommu_domain *domain, u32 w_count);
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/* Get the numer of window per domain */
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u32 (*domain_get_windows)(struct iommu_domain *domain);
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unsigned long pgsize_bitmap;
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};
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@@ -157,6 +169,10 @@ extern int iommu_domain_get_attr(struct iommu_domain *domain, enum iommu_attr,
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extern int iommu_domain_set_attr(struct iommu_domain *domain, enum iommu_attr,
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void *data);
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/* Window handling function prototypes */
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extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t offset, u64 size);
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extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
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/**
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* report_iommu_fault() - report about an IOMMU fault to the IOMMU framework
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* @domain: the iommu domain where the fault has happened
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@@ -239,6 +255,18 @@ static inline int iommu_unmap(struct iommu_domain *domain, unsigned long iova,
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return -ENODEV;
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}
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static inline int iommu_domain_window_enable(struct iommu_domain *domain,
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u32 wnd_nr, phys_addr_t paddr,
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u64 size)
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{
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return -ENODEV;
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}
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static inline void iommu_domain_window_disable(struct iommu_domain *domain,
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u32 wnd_nr)
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{
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}
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static inline phys_addr_t iommu_iova_to_phys(struct iommu_domain *domain,
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unsigned long iova)
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{
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18
include/linux/platform_data/sh_ipmmu.h
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18
include/linux/platform_data/sh_ipmmu.h
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@@ -0,0 +1,18 @@
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/* sh_ipmmu.h
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*
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* Copyright (C) 2012 Hideki EIRAKU
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*/
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#ifndef __SH_IPMMU_H__
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#define __SH_IPMMU_H__
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struct shmobile_ipmmu_platform_data {
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const char * const *dev_names;
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unsigned int num_dev_names;
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};
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#endif /* __SH_IPMMU_H__ */
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