MIPS: Cavium: Add EDAC support.
Drivers for EDAC on Cavium. Supported subsystems are: o CPU primary caches. These are parity protected only, so only error reporting. o Second level cache - ECC protected, provides SECDED. o Memory: ECC / SECDEC if used with suitable DRAM modules. The driver will will only initialize if ECC is enabled on a system so is safe to run on non-ECC memory. o PCI: Parity error reporting Since it is very hard to test this sort of code the implementation is very conservative and uses polling where possible for now. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
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@@ -4,9 +4,11 @@
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* for more details.
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*
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* Copyright (C) 2004-2007 Cavium Networks
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* Copyright (C) 2008 Wind River Systems
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* Copyright (C) 2008, 2009 Wind River Systems
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* written by Ralf Baechle <ralf@linux-mips.org>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/console.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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@@ -821,3 +823,29 @@ void __init device_tree_init(void)
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}
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unflatten_device_tree();
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}
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static char *edac_device_names[] = {
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"co_l2c_edac",
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"co_lmc_edac",
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"co_pc_edac",
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};
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static int __init edac_devinit(void)
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{
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struct platform_device *dev;
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int i, err = 0;
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char *name;
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for (i = 0; i < ARRAY_SIZE(edac_device_names); i++) {
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name = edac_device_names[i];
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dev = platform_device_register_simple(name, -1, NULL, 0);
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if (IS_ERR(dev)) {
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pr_err("Registation of %s failed!\n", name);
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err = PTR_ERR(dev);
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}
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}
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return err;
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}
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device_initcall(edac_devinit);
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