i40e: implement and use Rx CTL helper functions
Use the new AdminQ functions for safely accessing the Rx control registers that may be affected by heavy small packet traffic. Change-ID: Ibb00983e8dcba71f4b760222a609a5fcaa726f18 Signed-off-by: Shannon Nelson <shannon.nelson@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Jeff Kirsher

parent
3336514381
commit
f658137cbb
@@ -903,6 +903,131 @@ struct i40e_rx_ptype_decoded i40evf_ptype_lookup[] = {
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I40E_PTT_UNUSED_ENTRY(255)
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};
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/**
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* i40evf_aq_rx_ctl_read_register - use FW to read from an Rx control register
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* @hw: pointer to the hw struct
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* @reg_addr: register address
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* @reg_val: ptr to register value
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* @cmd_details: pointer to command details structure or NULL
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*
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* Use the firmware to read the Rx control register,
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* especially useful if the Rx unit is under heavy pressure
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**/
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i40e_status i40evf_aq_rx_ctl_read_register(struct i40e_hw *hw,
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u32 reg_addr, u32 *reg_val,
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struct i40e_asq_cmd_details *cmd_details)
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{
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struct i40e_aq_desc desc;
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struct i40e_aqc_rx_ctl_reg_read_write *cmd_resp =
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(struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
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i40e_status status;
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if (!reg_val)
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return I40E_ERR_PARAM;
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i40evf_fill_default_direct_cmd_desc(&desc,
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i40e_aqc_opc_rx_ctl_reg_read);
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cmd_resp->address = cpu_to_le32(reg_addr);
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status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
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if (status == 0)
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*reg_val = le32_to_cpu(cmd_resp->value);
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return status;
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}
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/**
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* i40evf_read_rx_ctl - read from an Rx control register
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* @hw: pointer to the hw struct
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* @reg_addr: register address
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**/
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u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr)
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{
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i40e_status status = 0;
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bool use_register;
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int retry = 5;
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u32 val = 0;
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use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
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if (!use_register) {
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do_retry:
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status = i40evf_aq_rx_ctl_read_register(hw, reg_addr,
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&val, NULL);
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if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
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usleep_range(1000, 2000);
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retry--;
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goto do_retry;
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}
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}
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/* if the AQ access failed, try the old-fashioned way */
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if (status || use_register)
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val = rd32(hw, reg_addr);
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return val;
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}
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/**
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* i40evf_aq_rx_ctl_write_register
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* @hw: pointer to the hw struct
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* @reg_addr: register address
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* @reg_val: register value
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* @cmd_details: pointer to command details structure or NULL
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*
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* Use the firmware to write to an Rx control register,
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* especially useful if the Rx unit is under heavy pressure
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**/
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i40e_status i40evf_aq_rx_ctl_write_register(struct i40e_hw *hw,
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u32 reg_addr, u32 reg_val,
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struct i40e_asq_cmd_details *cmd_details)
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{
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struct i40e_aq_desc desc;
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struct i40e_aqc_rx_ctl_reg_read_write *cmd =
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(struct i40e_aqc_rx_ctl_reg_read_write *)&desc.params.raw;
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i40e_status status;
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i40evf_fill_default_direct_cmd_desc(&desc,
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i40e_aqc_opc_rx_ctl_reg_write);
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cmd->address = cpu_to_le32(reg_addr);
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cmd->value = cpu_to_le32(reg_val);
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status = i40evf_asq_send_command(hw, &desc, NULL, 0, cmd_details);
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return status;
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}
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/**
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* i40evf_write_rx_ctl - write to an Rx control register
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* @hw: pointer to the hw struct
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* @reg_addr: register address
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* @reg_val: register value
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**/
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void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val)
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{
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i40e_status status = 0;
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bool use_register;
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int retry = 5;
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use_register = (hw->aq.api_maj_ver == 1) && (hw->aq.api_min_ver < 5);
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if (!use_register) {
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do_retry:
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status = i40evf_aq_rx_ctl_write_register(hw, reg_addr,
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reg_val, NULL);
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if (hw->aq.asq_last_status == I40E_AQ_RC_EAGAIN && retry) {
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usleep_range(1000, 2000);
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retry--;
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goto do_retry;
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}
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}
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/* if the AQ access failed, try the old-fashioned way */
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if (status || use_register)
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wr32(hw, reg_addr, reg_val);
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}
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/**
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* i40e_aq_send_msg_to_pf
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* @hw: pointer to the hardware structure
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@@ -103,6 +103,14 @@ i40e_status i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw,
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struct i40e_asq_cmd_details *cmd_details);
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void i40e_add_filter_to_drop_tx_flow_control_frames(struct i40e_hw *hw,
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u16 vsi_seid);
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i40e_status i40evf_aq_rx_ctl_read_register(struct i40e_hw *hw,
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u32 reg_addr, u32 *reg_val,
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struct i40e_asq_cmd_details *cmd_details);
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u32 i40evf_read_rx_ctl(struct i40e_hw *hw, u32 reg_addr);
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i40e_status i40evf_aq_rx_ctl_write_register(struct i40e_hw *hw,
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u32 reg_addr, u32 reg_val,
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struct i40e_asq_cmd_details *cmd_details);
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void i40evf_write_rx_ctl(struct i40e_hw *hw, u32 reg_addr, u32 reg_val);
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i40e_status i40e_read_phy_register(struct i40e_hw *hw, u8 page,
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u16 reg, u8 phy_addr, u16 *value);
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i40e_status i40e_write_phy_register(struct i40e_hw *hw, u8 page,
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