Merge tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Decrease polling rate for erase/trim/discard
- Allow non-sleeping GPIOs for card detect
- Improve mmc block removal path
- Enable support for mmc_sw_reset() for SDIO cards
- Add mmc_sw_reset() to allow users to do a soft reset of the card
- Allow power delay to be tunable via DT
- Allow card detect debounce delay to be tunable via DT
- Enable new quirk to limit clock rate for Marvell 8887 chip
- Don't show eMMC RPMB and BOOT areas in /proc/partitions
- Add capability to avoid 3.3V signaling for fragile HWs
MMC host:
- Improve/fixup support for handle highmem pages
- Remove depends on HAS_DMA in case of platform dependency
- mvsdio: Enable support for erase/trim/discard
- rtsx_usb: Enable support for erase/trim/discard
- renesas_sdhi: Fix WP logic regressions
- renesas_sdhi: Add r8a77965 support
- renesas_sdhi: Add R8A77980 to whitelist
- meson: Add optional support for device reset
- meson: Add support for the Meson-AXG platform
- dw_mmc: Add new driver for BlueField DW variant
- mediatek: Add support for 64G DRAM DMA
- sunxi: Deploy runtime PM support
- jz4740: Add support for JZ4780
- jz4740: Enable support for DT based platforms
- sdhci: Various improvement to timeout handling
- sdhci: Disable support for HS200/HS400/UHS when no 1.8V support
- sdhci-omap: Add support for controller in k2g SoC
- sdhci-omap: Add workarounds for a couple of Erratas
- sdhci-omap: Enable support for generic sdhci DT properties
- sdhci-cadence: Re-send tune request to deal with errata
- sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
- sdhci-pci: Avoid 3.3V signaling on some NI 904x
- sdhci-esdhc-imx: Use watermark levels for PIO access
- sdhci-msm: Improve card detection handling
- sdhci-msm: Add support voltage pad switching"
* tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (104 commits)
mmc: renesas_sdhi: really fix WP logic regressions
mmc: mvsdio: Enable MMC_CAP_ERASE
mmc: mvsdio: Respect card busy time out from mmc core
mmc: sdhci-msm: Remove NO_CARD_NO_RESET quirk
mmc: sunxi: Use ifdef rather than __maybe_unused
mmc: mxmmc: Use ifdef rather than __maybe_unused
mmc: mxmmc: include linux/highmem.h
mmc: sunxi: mark PM functions as __maybe_unused
mmc: Throttle calls to MMC_SEND_STATUS during mmc_do_erase()
mmc: au1xmmc: handle highmem pages
mmc: Allow non-sleeping GPIO cd
mmc: sdhci-*: Don't emit error msg if sdhci_add_host() fails
mmc: sd: Define name for default speed dtr
mmc: core: Move calls to ->prepare_hs400_tuning() closer to mmc code
mmc: sdhci-xenon: use match_string() helper
mmc: wbsd: handle highmem pages
mmc: ushc: handle highmem pages
mmc: mxcmmc: handle highmem pages
mmc: atmel-mci: use sg_copy_{from,to}_buffer
mmc: android-goldfish: use sg_copy_{from,to}_buffer
...
This commit is contained in:
Linus Torvalds
@@ -156,6 +156,7 @@ struct sd_switch_caps {
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#define UHS_DDR50_MAX_DTR 50000000
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#define UHS_SDR25_MAX_DTR UHS_DDR50_MAX_DTR
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#define UHS_SDR12_MAX_DTR 25000000
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#define DEFAULT_SPEED_MAX_DTR UHS_SDR12_MAX_DTR
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unsigned int sd3_bus_mode;
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#define UHS_SDR12_BUS_SPEED 0
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#define HIGH_SPEED_BUS_SPEED 1
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@@ -252,6 +253,7 @@ struct mmc_card {
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#define MMC_TYPE_SD_COMBO 3 /* SD combo (IO+mem) card */
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unsigned int state; /* (our) card state */
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unsigned int quirks; /* card quirks */
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unsigned int quirk_max_rate; /* max rate set by quirks */
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#define MMC_QUIRK_LENIENT_FN0 (1<<0) /* allow SDIO FN0 writes outside of the VS CCCR range */
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#define MMC_QUIRK_BLKSZ_FOR_BYTE_MODE (1<<1) /* use func->cur_blksize */
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/* for byte mode */
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@@ -177,6 +177,7 @@ int mmc_wait_for_cmd(struct mmc_host *host, struct mmc_command *cmd,
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int retries);
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int mmc_hw_reset(struct mmc_host *host);
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int mmc_sw_reset(struct mmc_host *host);
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void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card);
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#endif /* LINUX_MMC_CORE_H */
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@@ -22,6 +22,7 @@
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struct mmc_ios {
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unsigned int clock; /* clock rate */
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unsigned short vdd;
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unsigned int power_delay_ms; /* waiting for stable power */
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/* vdd stores the bit number of the selected voltage range from below. */
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@@ -320,6 +321,9 @@ struct mmc_host {
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#define MMC_CAP_UHS_SDR50 (1 << 18) /* Host supports UHS SDR50 mode */
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#define MMC_CAP_UHS_SDR104 (1 << 19) /* Host supports UHS SDR104 mode */
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#define MMC_CAP_UHS_DDR50 (1 << 20) /* Host supports UHS DDR50 mode */
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#define MMC_CAP_UHS (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | \
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MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | \
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MMC_CAP_UHS_DDR50)
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/* (1 << 21) is free for reuse */
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#define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
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#define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
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@@ -345,6 +349,7 @@ struct mmc_host {
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#define MMC_CAP2_HS400_1_2V (1 << 16) /* Can support HS400 1.2V */
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#define MMC_CAP2_HS400 (MMC_CAP2_HS400_1_8V | \
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MMC_CAP2_HS400_1_2V)
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#define MMC_CAP2_HSX00_1_8V (MMC_CAP2_HS200_1_8V_SDR | MMC_CAP2_HS400_1_8V)
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#define MMC_CAP2_HSX00_1_2V (MMC_CAP2_HS200_1_2V_SDR | MMC_CAP2_HS400_1_2V)
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#define MMC_CAP2_SDIO_IRQ_NOTHREAD (1 << 17)
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#define MMC_CAP2_NO_WRITE_PROTECT (1 << 18) /* No physical write protect pin, assume that card is always read-write */
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@@ -354,6 +359,7 @@ struct mmc_host {
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#define MMC_CAP2_NO_MMC (1 << 22) /* Do not send (e)MMC commands during initialization */
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#define MMC_CAP2_CQE (1 << 23) /* Has eMMC command queue engine */
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#define MMC_CAP2_CQE_DCMD (1 << 24) /* CQE can issue a direct command */
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#define MMC_CAP2_AVOID_3_3V (1 << 25) /* Host must negotiate down from 3.3V */
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int fixed_drv_type; /* fixed driver type for non-removable media */
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@@ -55,6 +55,7 @@
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#define SDIO_DEVICE_ID_MARVELL_8688WLAN 0x9104
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#define SDIO_DEVICE_ID_MARVELL_8688BT 0x9105
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#define SDIO_DEVICE_ID_MARVELL_8797_F0 0x9128
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#define SDIO_DEVICE_ID_MARVELL_8887WLAN 0x9134
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#define SDIO_VENDOR_ID_SIANO 0x039a
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#define SDIO_DEVICE_ID_SIANO_NOVA_B0 0x0201
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