[PATCH] remove kernel syscalls
The last thing we agreed on was to remove the macros entirely for 2.6.19, on all architectures. Unfortunately, I think nobody actually _did_ that, so they are still there. [akpm@osdl.org: x86_64 fix] Cc: David Woodhouse <dwmw2@infradead.org> Cc: Greg Schafer <gschafer@zip.com.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
Arnd Bergmann
committed by
Linus Torvalds
Linus Torvalds
parent
28ec24e232
commit
f5738ceed4
@@ -933,268 +933,6 @@
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#ifndef __ASSEMBLY__
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/* XXX - _foo needs to be __foo, while __NR_bar could be _NR_bar. */
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#define _syscall0(type,name) \
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type name(void) \
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{ \
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register unsigned long __a3 asm("$7"); \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %2\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "=r" (__a3) \
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: "i" (__NR_##name) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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/*
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* DANGER: This macro isn't usable for the pipe(2) call
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* which has a unusual return convention.
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*/
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#define _syscall1(type,name,atype,a) \
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type name(atype a) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a3 asm("$7"); \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %3\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "=r" (__a3) \
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: "r" (__a0), "i" (__NR_##name) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#define _syscall2(type,name,atype,a,btype,b) \
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type name(atype a, btype b) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a3 asm("$7"); \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %4\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "=r" (__a3) \
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: "r" (__a0), "r" (__a1), "i" (__NR_##name) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#define _syscall3(type,name,atype,a,btype,b,ctype,c) \
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type name(atype a, btype b, ctype c) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7"); \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %5\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "=r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#define _syscall4(type,name,atype,a,btype,b,ctype,c,dtype,d) \
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type name(atype a, btype b, ctype c, dtype d) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7") = (unsigned long) d; \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %5\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "+r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#if (_MIPS_SIM == _MIPS_SIM_ABI32)
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/*
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* Using those means your brain needs more than an oil change ;-)
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*/
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#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
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type name(atype a, btype b, ctype c, dtype d, etype e) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7") = (unsigned long) d; \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"lw\t$2, %6\n\t" \
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"subu\t$29, 32\n\t" \
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"sw\t$2, 16($29)\n\t" \
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"li\t$2, %5\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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"addiu\t$29, 32\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "+r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
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"m" ((unsigned long)e) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
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type name(atype a, btype b, ctype c, dtype d, etype e, ftype f) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7") = (unsigned long) d; \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"lw\t$2, %6\n\t" \
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"lw\t$8, %7\n\t" \
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"subu\t$29, 32\n\t" \
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"sw\t$2, 16($29)\n\t" \
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"sw\t$8, 20($29)\n\t" \
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"li\t$2, %5\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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"addiu\t$29, 32\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "+r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "i" (__NR_##name), \
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"m" ((unsigned long)e), "m" ((unsigned long)f) \
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: "$2", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#endif /* (_MIPS_SIM == _MIPS_SIM_ABI32) */
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#if (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64)
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#define _syscall5(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e) \
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type name (atype a,btype b,ctype c,dtype d,etype e) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7") = (unsigned long) d; \
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register unsigned long __a4 asm("$8") = (unsigned long) e; \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %6\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "+r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "i" (__NR_##name) \
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: "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#define _syscall6(type,name,atype,a,btype,b,ctype,c,dtype,d,etype,e,ftype,f) \
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type name (atype a,btype b,ctype c,dtype d,etype e,ftype f) \
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{ \
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register unsigned long __a0 asm("$4") = (unsigned long) a; \
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register unsigned long __a1 asm("$5") = (unsigned long) b; \
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register unsigned long __a2 asm("$6") = (unsigned long) c; \
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register unsigned long __a3 asm("$7") = (unsigned long) d; \
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register unsigned long __a4 asm("$8") = (unsigned long) e; \
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register unsigned long __a5 asm("$9") = (unsigned long) f; \
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unsigned long __v0; \
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\
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__asm__ volatile ( \
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".set\tnoreorder\n\t" \
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"li\t$2, %7\t\t\t# " #name "\n\t" \
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"syscall\n\t" \
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"move\t%0, $2\n\t" \
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".set\treorder" \
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: "=&r" (__v0), "+r" (__a3) \
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: "r" (__a0), "r" (__a1), "r" (__a2), "r" (__a4), "r" (__a5), \
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"i" (__NR_##name) \
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: "$2", "$9", "$10", "$11", "$12", "$13", "$14", "$15", "$24", \
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"memory"); \
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\
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if (__a3 == 0) \
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return (type) __v0; \
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errno = __v0; \
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return (type) -1; \
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}
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#endif /* (_MIPS_SIM == _MIPS_SIM_NABI32) || (_MIPS_SIM == _MIPS_SIM_ABI64) */
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#define __ARCH_OMIT_COMPAT_SYS_GETDENTS64
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#define __ARCH_WANT_IPC_PARSE_VERSION
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#define __ARCH_WANT_OLD_READDIR
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