dma-buf: Rename struct fence to dma_fence
I plan to usurp the short name of struct fence for a core kernel struct, and so I need to rename the specialised fence/timeline for DMA operations to make room. A consensus was reached in https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html that making clear this fence applies to DMA operations was a good thing. Since then the patch has grown a bit as usage increases, so hopefully it remains a good thing! (v2...: rebase, rerun spatch) v3: Compile on msm, spotted a manual fixup that I broke. v4: Try again for msm, sorry Daniel coccinelle script: @@ @@ - struct fence + struct dma_fence @@ @@ - struct fence_ops + struct dma_fence_ops @@ @@ - struct fence_cb + struct dma_fence_cb @@ @@ - struct fence_array + struct dma_fence_array @@ @@ - enum fence_flag_bits + enum dma_fence_flag_bits @@ @@ ( - fence_init + dma_fence_init | - fence_release + dma_fence_release | - fence_free + dma_fence_free | - fence_get + dma_fence_get | - fence_get_rcu + dma_fence_get_rcu | - fence_put + dma_fence_put | - fence_signal + dma_fence_signal | - fence_signal_locked + dma_fence_signal_locked | - fence_default_wait + dma_fence_default_wait | - fence_add_callback + dma_fence_add_callback | - fence_remove_callback + dma_fence_remove_callback | - fence_enable_sw_signaling + dma_fence_enable_sw_signaling | - fence_is_signaled_locked + dma_fence_is_signaled_locked | - fence_is_signaled + dma_fence_is_signaled | - fence_is_later + dma_fence_is_later | - fence_later + dma_fence_later | - fence_wait_timeout + dma_fence_wait_timeout | - fence_wait_any_timeout + dma_fence_wait_any_timeout | - fence_wait + dma_fence_wait | - fence_context_alloc + dma_fence_context_alloc | - fence_array_create + dma_fence_array_create | - to_fence_array + to_dma_fence_array | - fence_is_array + dma_fence_is_array | - trace_fence_emit + trace_dma_fence_emit | - FENCE_TRACE + DMA_FENCE_TRACE | - FENCE_WARN + DMA_FENCE_WARN | - FENCE_ERR + DMA_FENCE_ERR ) ( ... ) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk> Acked-by: Sumit Semwal <sumit.semwal@linaro.org> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
committed by
Daniel Vetter
Daniel Vetter
parent
0fc4f78f44
commit
f54d186700
@@ -34,7 +34,7 @@
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#include <linux/kref.h>
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#include <linux/interval_tree.h>
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#include <linux/hashtable.h>
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#include <linux/fence.h>
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#include <linux/dma-fence.h>
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#include <ttm/ttm_bo_api.h>
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#include <ttm/ttm_bo_driver.h>
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@@ -378,7 +378,7 @@ struct amdgpu_fence_driver {
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struct timer_list fallback_timer;
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unsigned num_fences_mask;
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spinlock_t lock;
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struct fence **fences;
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struct dma_fence **fences;
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};
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/* some special values for the owner field */
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@@ -399,7 +399,7 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
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unsigned irq_type);
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void amdgpu_fence_driver_suspend(struct amdgpu_device *adev);
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void amdgpu_fence_driver_resume(struct amdgpu_device *adev);
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int amdgpu_fence_emit(struct amdgpu_ring *ring, struct fence **fence);
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int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence);
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void amdgpu_fence_process(struct amdgpu_ring *ring);
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int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
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unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
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@@ -427,7 +427,7 @@ struct amdgpu_bo_va_mapping {
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struct amdgpu_bo_va {
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/* protected by bo being reserved */
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struct list_head bo_list;
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struct fence *last_pt_update;
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struct dma_fence *last_pt_update;
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unsigned ref_count;
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/* protected by vm mutex and spinlock */
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@@ -543,7 +543,7 @@ struct amdgpu_sa_bo {
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struct amdgpu_sa_manager *manager;
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unsigned soffset;
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unsigned eoffset;
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struct fence *fence;
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struct dma_fence *fence;
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};
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/*
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@@ -566,19 +566,19 @@ int amdgpu_mode_dumb_mmap(struct drm_file *filp,
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*/
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struct amdgpu_sync {
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DECLARE_HASHTABLE(fences, 4);
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struct fence *last_vm_update;
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struct dma_fence *last_vm_update;
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};
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void amdgpu_sync_create(struct amdgpu_sync *sync);
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int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
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struct fence *f);
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struct dma_fence *f);
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int amdgpu_sync_resv(struct amdgpu_device *adev,
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struct amdgpu_sync *sync,
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struct reservation_object *resv,
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void *owner);
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struct fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
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struct amdgpu_ring *ring);
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struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
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void amdgpu_sync_free(struct amdgpu_sync *sync);
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int amdgpu_sync_init(void);
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void amdgpu_sync_fini(void);
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@@ -703,10 +703,10 @@ struct amdgpu_flip_work {
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uint64_t base;
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struct drm_pending_vblank_event *event;
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struct amdgpu_bo *old_abo;
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struct fence *excl;
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struct dma_fence *excl;
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unsigned shared_count;
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struct fence **shared;
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struct fence_cb cb;
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struct dma_fence **shared;
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struct dma_fence_cb cb;
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bool async;
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};
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@@ -742,7 +742,7 @@ void amdgpu_job_free_resources(struct amdgpu_job *job);
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void amdgpu_job_free(struct amdgpu_job *job);
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int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
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struct amd_sched_entity *entity, void *owner,
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struct fence **f);
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struct dma_fence **f);
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struct amdgpu_ring {
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struct amdgpu_device *adev;
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@@ -844,7 +844,7 @@ struct amdgpu_vm {
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/* contains the page directory */
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struct amdgpu_bo *page_directory;
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unsigned max_pde_used;
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struct fence *page_directory_fence;
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struct dma_fence *page_directory_fence;
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uint64_t last_eviction_counter;
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/* array of page tables, one for each page directory entry */
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@@ -865,14 +865,14 @@ struct amdgpu_vm {
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struct amdgpu_vm_id {
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struct list_head list;
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struct fence *first;
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struct dma_fence *first;
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struct amdgpu_sync active;
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struct fence *last_flush;
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struct dma_fence *last_flush;
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atomic64_t owner;
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uint64_t pd_gpu_addr;
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/* last flushed PD/PT update */
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struct fence *flushed_updates;
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struct dma_fence *flushed_updates;
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uint32_t current_gpu_reset_count;
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@@ -921,7 +921,7 @@ void amdgpu_vm_get_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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void amdgpu_vm_move_pt_bos_in_lru(struct amdgpu_device *adev,
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struct amdgpu_vm *vm);
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int amdgpu_vm_grab_id(struct amdgpu_vm *vm, struct amdgpu_ring *ring,
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struct amdgpu_sync *sync, struct fence *fence,
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struct amdgpu_sync *sync, struct dma_fence *fence,
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struct amdgpu_job *job);
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int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job);
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void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
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@@ -957,7 +957,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
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struct amdgpu_ctx_ring {
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uint64_t sequence;
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struct fence **fences;
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struct dma_fence **fences;
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struct amd_sched_entity entity;
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};
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@@ -966,7 +966,7 @@ struct amdgpu_ctx {
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struct amdgpu_device *adev;
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unsigned reset_counter;
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spinlock_t ring_lock;
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struct fence **fences;
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struct dma_fence **fences;
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struct amdgpu_ctx_ring rings[AMDGPU_MAX_RINGS];
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bool preamble_presented;
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};
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@@ -982,8 +982,8 @@ struct amdgpu_ctx *amdgpu_ctx_get(struct amdgpu_fpriv *fpriv, uint32_t id);
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int amdgpu_ctx_put(struct amdgpu_ctx *ctx);
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uint64_t amdgpu_ctx_add_fence(struct amdgpu_ctx *ctx, struct amdgpu_ring *ring,
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struct fence *fence);
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struct fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
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struct dma_fence *fence);
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struct dma_fence *amdgpu_ctx_get_fence(struct amdgpu_ctx *ctx,
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struct amdgpu_ring *ring, uint64_t seq);
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int amdgpu_ctx_ioctl(struct drm_device *dev, void *data,
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@@ -1181,10 +1181,10 @@ struct amdgpu_gfx {
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int amdgpu_ib_get(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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unsigned size, struct amdgpu_ib *ib);
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void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib,
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struct fence *f);
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struct dma_fence *f);
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int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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struct amdgpu_ib *ib, struct fence *last_vm_update,
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struct amdgpu_job *job, struct fence **f);
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struct amdgpu_ib *ib, struct dma_fence *last_vm_update,
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struct amdgpu_job *job, struct dma_fence **f);
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int amdgpu_ib_pool_init(struct amdgpu_device *adev);
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void amdgpu_ib_pool_fini(struct amdgpu_device *adev);
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int amdgpu_ib_ring_tests(struct amdgpu_device *adev);
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@@ -1225,7 +1225,7 @@ struct amdgpu_cs_parser {
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struct amdgpu_bo_list *bo_list;
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struct amdgpu_bo_list_entry vm_pd;
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struct list_head validated;
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struct fence *fence;
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struct dma_fence *fence;
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uint64_t bytes_moved_threshold;
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uint64_t bytes_moved;
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struct amdgpu_bo_list_entry *evictable;
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@@ -1245,7 +1245,7 @@ struct amdgpu_job {
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struct amdgpu_ring *ring;
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struct amdgpu_sync sync;
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struct amdgpu_ib *ibs;
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struct fence *fence; /* the hw fence */
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struct dma_fence *fence; /* the hw fence */
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uint32_t preamble_status;
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uint32_t num_ibs;
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void *owner;
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