drm/radeon/kms: display watermark updates (v2)
- Add module option to force the display priority 0 = auto, 1 = normal, 2 = high - Default to high on r3xx/r4xx/rv515 chips Fixes flickering problems during heavy acceleration due to underflow to the display controllers - Fill in minimal support for RS600 v2 - update display priority when bandwidth is updated so the user can change the parameter at runtime and it will take affect on the next modeset. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie

parent
3b01a1191f
commit
f46c01208d
@@ -2389,6 +2389,8 @@ void r100_bandwidth_update(struct radeon_device *rdev)
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uint32_t pixel_bytes1 = 0;
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uint32_t pixel_bytes2 = 0;
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radeon_update_display_priority(rdev);
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if (rdev->mode_info.crtcs[0]->base.enabled) {
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mode1 = &rdev->mode_info.crtcs[0]->base.mode;
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pixel_bytes1 = rdev->mode_info.crtcs[0]->base.fb->bits_per_pixel / 8;
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