dma-mapping: move the dma_coherent flag to struct device
Various architectures support both coherent and non-coherent dma on a per-device basis. Move the dma_noncoherent flag from the mips archdata field to struct device proper to prepare the infrastructure for reuse on other architectures. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Paul Burton <paul.burton@mips.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@@ -1106,6 +1106,7 @@ config ARCH_SUPPORTS_UPROBES
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bool
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config DMA_MAYBE_COHERENT
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select ARCH_HAS_DMA_COHERENCE_H
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select DMA_NONCOHERENT
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bool
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@@ -1,6 +1,7 @@
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# MIPS headers
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generic-(CONFIG_GENERIC_CSUM) += checksum.h
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generic-y += current.h
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generic-y += device.h
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generic-y += dma-contiguous.h
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generic-y += emergency-restart.h
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generic-y += export.h
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@@ -1,19 +0,0 @@
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/*
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* Arch specific extensions to struct device
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*
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* This file is released under the GPLv2
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*/
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#ifndef _ASM_MIPS_DEVICE_H
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#define _ASM_MIPS_DEVICE_H
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struct dev_archdata {
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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/* Non-zero if DMA is coherent with CPU caches */
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bool dma_coherent;
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#endif
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};
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struct pdev_archdata {
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};
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#endif /* _ASM_MIPS_DEVICE_H*/
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@@ -20,6 +20,12 @@ enum coherent_io_user_state {
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#elif defined(CONFIG_DMA_MAYBE_COHERENT)
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extern enum coherent_io_user_state coherentio;
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extern int hw_coherentio;
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static inline bool dev_is_dma_coherent(struct device *dev)
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{
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return coherentio == IO_COHERENCE_ENABLED ||
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(coherentio == IO_COHERENCE_DEFAULT && hw_coherentio);
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}
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#else
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#ifdef CONFIG_DMA_NONCOHERENT
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#define coherentio IO_COHERENCE_DISABLED
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@@ -25,7 +25,7 @@ static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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bool coherent)
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{
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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dev->archdata.dma_coherent = coherent;
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dev->dma_coherent = coherent;
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#endif
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}
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@@ -14,26 +14,6 @@
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#include <asm/dma-coherence.h>
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#include <asm/io.h>
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#ifdef CONFIG_DMA_PERDEV_COHERENT
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static inline int dev_is_coherent(struct device *dev)
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{
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return dev->archdata.dma_coherent;
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}
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#else
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static inline int dev_is_coherent(struct device *dev)
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{
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switch (coherentio) {
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default:
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case IO_COHERENCE_DEFAULT:
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return hw_coherentio;
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case IO_COHERENCE_ENABLED:
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return 1;
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case IO_COHERENCE_DISABLED:
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return 0;
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}
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}
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#endif /* CONFIG_DMA_PERDEV_COHERENT */
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/*
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* The affected CPUs below in 'cpu_needs_post_dma_flush()' can speculatively
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* fill random cachelines with stale data at any time, requiring an extra
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@@ -49,7 +29,7 @@ static inline int dev_is_coherent(struct device *dev)
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*/
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static inline bool cpu_needs_post_dma_flush(struct device *dev)
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{
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if (dev_is_coherent(dev))
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if (dev_is_dma_coherent(dev))
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return false;
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switch (boot_cpu_type()) {
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@@ -76,7 +56,7 @@ void *arch_dma_alloc(struct device *dev, size_t size,
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if (!ret)
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return NULL;
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if (!dev_is_coherent(dev) && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
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if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_NON_CONSISTENT)) {
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dma_cache_wback_inv((unsigned long) ret, size);
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ret = (void *)UNCAC_ADDR(ret);
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}
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@@ -87,7 +67,7 @@ void *arch_dma_alloc(struct device *dev, size_t size,
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void arch_dma_free(struct device *dev, size_t size, void *cpu_addr,
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dma_addr_t dma_addr, unsigned long attrs)
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{
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if (!(attrs & DMA_ATTR_NON_CONSISTENT) && !dev_is_coherent(dev))
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if (!(attrs & DMA_ATTR_NON_CONSISTENT) && !dev_is_dma_coherent(dev))
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cpu_addr = (void *)CAC_ADDR((unsigned long)cpu_addr);
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dma_direct_free(dev, size, cpu_addr, dma_addr, attrs);
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}
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@@ -103,7 +83,7 @@ int arch_dma_mmap(struct device *dev, struct vm_area_struct *vma,
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unsigned long pfn;
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int ret = -ENXIO;
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if (!dev_is_coherent(dev))
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if (!dev_is_dma_coherent(dev))
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addr = CAC_ADDR(addr);
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pfn = page_to_pfn(virt_to_page((void *)addr));
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@@ -187,7 +167,7 @@ static inline void dma_sync_phys(phys_addr_t paddr, size_t size,
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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if (!dev_is_coherent(dev))
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if (!dev_is_dma_coherent(dev))
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dma_sync_phys(paddr, size, dir);
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}
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@@ -203,6 +183,6 @@ void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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{
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BUG_ON(direction == DMA_NONE);
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if (!dev_is_coherent(dev))
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if (!dev_is_dma_coherent(dev))
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dma_sync_virt(vaddr, size, direction);
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}
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