wil6210: set dma mask to reflect device capability
device supports 48bit addresses, reflect that by setting the dma mask accordingly. Signed-off-by: Hamad Kadmany <qca_hkadmany@qca.qualcomm.com> Signed-off-by: Maya Erez <qca_merez@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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committed by
Kalle Valo

parent
4aa2d31f5d
commit
f2de576dcf
@@ -123,15 +123,32 @@ static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
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vring->va = NULL;
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return -ENOMEM;
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}
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/* vring->va should be aligned on its size rounded up to power of 2
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* This is granted by the dma_alloc_coherent
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* This is granted by the dma_alloc_coherent.
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*
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* HW has limitation that all vrings addresses must share the same
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* upper 16 msb bits part of 48 bits address. To workaround that,
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* if we are using 48 bit addresses switch to 32 bit allocation
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* before allocating vring memory.
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*
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* There's no check for the return value of dma_set_mask_and_coherent,
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* since we assume if we were able to set the mask during
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* initialization in this system it will not fail if we set it again
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*/
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if (wil->use_extended_dma_addr)
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dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
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vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
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if (!vring->va) {
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kfree(vring->ctx);
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vring->ctx = NULL;
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return -ENOMEM;
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}
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if (wil->use_extended_dma_addr)
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dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
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/* initially, all descriptors are SW owned
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* For Tx and Rx, ownership bit is at the same location, thus
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* we can use any
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