VMCI: Support upto 64-bit PPNs
Add support in the VMCI driver to handle upto 64-bit PPNs when the VMCI device exposes the capability for 64-bit PPNs. Reviewed-by: Adit Ranadive <aditr@vmware.com> Reviewed-by: Jorgen Hansen <jhansen@vmware.com> Signed-off-by: Vishnu Dasa <vdasa@vmware.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman

parent
bede03a579
commit
f2db7361cb
@@ -64,6 +64,13 @@ struct vmci_guest_device {
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dma_addr_t notification_base;
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};
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static bool use_ppn64;
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bool vmci_use_ppn64(void)
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{
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return use_ppn64;
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}
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/* vmci_dev singleton device and supporting data*/
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struct pci_dev *vmci_pdev;
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static struct vmci_guest_device *vmci_dev_g;
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@@ -432,6 +439,7 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
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struct vmci_guest_device *vmci_dev;
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void __iomem *iobase;
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unsigned int capabilities;
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unsigned int caps_in_use;
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unsigned long cmd;
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int vmci_err;
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int error;
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@@ -496,6 +504,23 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
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error = -ENXIO;
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goto err_free_data_buffer;
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}
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caps_in_use = VMCI_CAPS_DATAGRAM;
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/*
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* Use 64-bit PPNs if the device supports.
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*
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* There is no check for the return value of dma_set_mask_and_coherent
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* since this driver can handle the default mask values if
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* dma_set_mask_and_coherent fails.
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*/
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if (capabilities & VMCI_CAPS_PPN64) {
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dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
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use_ppn64 = true;
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caps_in_use |= VMCI_CAPS_PPN64;
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} else {
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dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(44));
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use_ppn64 = false;
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}
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/*
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* If the hardware supports notifications, we will use that as
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@@ -510,14 +535,14 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
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"Unable to allocate notification bitmap\n");
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} else {
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memset(vmci_dev->notification_bitmap, 0, PAGE_SIZE);
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capabilities |= VMCI_CAPS_NOTIFICATIONS;
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caps_in_use |= VMCI_CAPS_NOTIFICATIONS;
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}
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}
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dev_info(&pdev->dev, "Using capabilities 0x%x\n", capabilities);
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dev_info(&pdev->dev, "Using capabilities 0x%x\n", caps_in_use);
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/* Let the host know which capabilities we intend to use. */
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iowrite32(capabilities, vmci_dev->iobase + VMCI_CAPS_ADDR);
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iowrite32(caps_in_use, vmci_dev->iobase + VMCI_CAPS_ADDR);
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/* Set up global device so that we can start sending datagrams */
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spin_lock_irq(&vmci_dev_spinlock);
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@@ -529,13 +554,13 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
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* Register notification bitmap with device if that capability is
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* used.
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*/
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if (capabilities & VMCI_CAPS_NOTIFICATIONS) {
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if (caps_in_use & VMCI_CAPS_NOTIFICATIONS) {
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unsigned long bitmap_ppn =
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vmci_dev->notification_base >> PAGE_SHIFT;
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if (!vmci_dbell_register_notification_bitmap(bitmap_ppn)) {
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dev_warn(&pdev->dev,
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"VMCI device unable to register notification bitmap with PPN 0x%x\n",
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(u32) bitmap_ppn);
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"VMCI device unable to register notification bitmap with PPN 0x%lx\n",
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bitmap_ppn);
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error = -ENXIO;
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goto err_remove_vmci_dev_g;
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}
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@@ -611,7 +636,7 @@ static int vmci_guest_probe_device(struct pci_dev *pdev,
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/* Enable specific interrupt bits. */
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cmd = VMCI_IMR_DATAGRAM;
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if (capabilities & VMCI_CAPS_NOTIFICATIONS)
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if (caps_in_use & VMCI_CAPS_NOTIFICATIONS)
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cmd |= VMCI_IMR_NOTIFICATION;
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iowrite32(cmd, vmci_dev->iobase + VMCI_IMR_ADDR);
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