mtd: rawnand: Move the ->exec_op() method to nand_controller_ops
->exec_op() is a controller method and has nothing to do in the nand_chip struct. Let's move it to the nand_controller_ops struct and adjust the core and drivers accordingly. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Tested-by: Janusz Krzysztofik <jmkrzyszt@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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committed by
Miquel Raynal

parent
7d6c37e90c
commit
f2abfeb207
@@ -240,49 +240,6 @@ struct nand_id {
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int len;
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};
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/**
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* struct nand_controller_ops - Controller operations
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*
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* @attach_chip: this method is called after the NAND detection phase after
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* flash ID and MTD fields such as erase size, page size and OOB
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* size have been set up. ECC requirements are available if
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* provided by the NAND chip or device tree. Typically used to
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* choose the appropriate ECC configuration and allocate
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* associated resources.
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* This hook is optional.
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* @detach_chip: free all resources allocated/claimed in
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* nand_controller_ops->attach_chip().
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* This hook is optional.
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*/
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struct nand_controller_ops {
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int (*attach_chip)(struct nand_chip *chip);
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void (*detach_chip)(struct nand_chip *chip);
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};
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/**
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* struct nand_controller - Structure used to describe a NAND controller
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*
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* @lock: protection lock
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* @active: the mtd device which holds the controller currently
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* @wq: wait queue to sleep on if a NAND operation is in
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* progress used instead of the per chip wait queue
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* when a hw controller is available.
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* @ops: NAND controller operations.
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*/
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struct nand_controller {
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spinlock_t lock;
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struct nand_chip *active;
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wait_queue_head_t wq;
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const struct nand_controller_ops *ops;
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};
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static inline void nand_controller_init(struct nand_controller *nfc)
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{
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nfc->active = NULL;
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spin_lock_init(&nfc->lock);
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init_waitqueue_head(&nfc->wq);
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}
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/**
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* struct nand_ecc_step_info - ECC step information of ECC engine
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* @stepsize: data bytes per ECC step
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@@ -897,6 +854,55 @@ struct nand_operation {
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int nand_op_parser_exec_op(struct nand_chip *chip,
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const struct nand_op_parser *parser,
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const struct nand_operation *op, bool check_only);
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/**
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* struct nand_controller_ops - Controller operations
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*
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* @attach_chip: this method is called after the NAND detection phase after
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* flash ID and MTD fields such as erase size, page size and OOB
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* size have been set up. ECC requirements are available if
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* provided by the NAND chip or device tree. Typically used to
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* choose the appropriate ECC configuration and allocate
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* associated resources.
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* This hook is optional.
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* @detach_chip: free all resources allocated/claimed in
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* nand_controller_ops->attach_chip().
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* This hook is optional.
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* @exec_op: controller specific method to execute NAND operations.
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* This method replaces chip->legacy.cmdfunc(),
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* chip->legacy.{read,write}_{buf,byte,word}(),
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* chip->legacy.dev_ready() and chip->legacy.waifunc().
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*/
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struct nand_controller_ops {
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int (*attach_chip)(struct nand_chip *chip);
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void (*detach_chip)(struct nand_chip *chip);
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int (*exec_op)(struct nand_chip *chip,
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const struct nand_operation *op,
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bool check_only);
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};
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/**
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* struct nand_controller - Structure used to describe a NAND controller
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*
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* @lock: protection lock
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* @active: the mtd device which holds the controller currently
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* @wq: wait queue to sleep on if a NAND operation is in
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* progress used instead of the per chip wait queue
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* when a hw controller is available.
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* @ops: NAND controller operations.
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*/
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struct nand_controller {
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spinlock_t lock;
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struct nand_chip *active;
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wait_queue_head_t wq;
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const struct nand_controller_ops *ops;
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};
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static inline void nand_controller_init(struct nand_controller *nfc)
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{
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nfc->active = NULL;
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spin_lock_init(&nfc->lock);
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init_waitqueue_head(&nfc->wq);
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}
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/**
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* struct nand_legacy - NAND chip legacy fields/hooks
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@@ -956,10 +962,6 @@ struct nand_legacy {
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* you're modifying an existing driver that is using those
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* fields/hooks, you should consider reworking the driver
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* avoid using them.
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* @exec_op: controller specific method to execute NAND operations.
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* This method replaces ->cmdfunc(),
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* ->legacy.{read,write}_{buf,byte,word}(),
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* ->legacy.dev_ready() and ->waifunc().
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* @setup_read_retry: [FLASHSPECIFIC] flash (vendor) specific function for
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* setting the read-retry mode. Mostly needed for MLC NAND.
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* @ecc: [BOARDSPECIFIC] ECC control structure
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@@ -1041,9 +1043,6 @@ struct nand_chip {
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struct nand_legacy legacy;
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int (*exec_op)(struct nand_chip *chip,
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const struct nand_operation *op,
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bool check_only);
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int (*setup_read_retry)(struct nand_chip *chip, int retry_mode);
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int (*setup_data_interface)(struct nand_chip *chip, int chipnr,
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const struct nand_data_interface *conf);
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