xiaomi-sm8450/android_kernel_xiaomi_sm8450
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cxgb3: More flexible support for PHY interrupts.

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Do not require PHY interrupts to be connected to GPIs in ascending order.
Base interrupt availability both on PHYs supporting them and on GPIs being
hooked up.  Allows boards to specify interrupt GPIs though the PHYs don't
use them.

Remove spurious PHY interrupts due to clearing T3DBG interrupts before
setting their polarity.

Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Divy Le Ray
2008-10-08 17:39:00 -07:00
committed by David S. Miller
parent 044979827e
commit f231e0a5a2
3 changed files with 27 additions and 18 deletions
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4
drivers/net/cxgb3/regs.h
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@@ -573,6 +573,10 @@
#define V_GPIO10(x) ((x) << S_GPIO10)
#define F_GPIO10 V_GPIO10(1U)
#define S_GPIO9 9
#define V_GPIO9(x) ((x) << S_GPIO9)
#define F_GPIO9 V_GPIO9(1U)
#define S_GPIO7 7
#define V_GPIO7(x) ((x) << S_GPIO7)
#define F_GPIO7 V_GPIO7(1U)