xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

mmc: tmio: improve checkpatch cleanness

Browse Source 
Trivial updates to improve checkpatch cleanness.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Simon Horman
2017-06-16 18:11:03 +02:00
committed by Ulf Hansson
parent 6cf4156c09
commit f2218db815
5 changed files with 66 additions and 60 deletions
Download Patch File Download Diff File Expand all files Collapse all files

33
include/linux/mfd/tmio.h
View File

@@ -13,15 +13,15 @@
#define tmio_ioread16(addr) readw(addr)
#define tmio_ioread16_rep(r, b, l) readsw(r, b, l)
#define tmio_ioread32(addr) \
(((u32) readw((addr))) | (((u32) readw((addr) + 2)) << 16))
(((u32)readw((addr))) | (((u32)readw((addr) + 2)) << 16))
#define tmio_iowrite8(val, addr) writeb((val), (addr))
#define tmio_iowrite16(val, addr) writew((val), (addr))
#define tmio_iowrite16_rep(r, b, l) writesw(r, b, l)
#define tmio_iowrite32(val, addr) \
do { \
writew((val), (addr)); \
writew((val) >> 16, (addr) + 2); \
writew((val), (addr)); \
writew((val) >> 16, (addr) + 2); \
} while (0)
#define CNF_CMD 0x04
@@ -55,57 +55,57 @@
} while (0)
/* tmio MMC platform flags */
#define TMIO_MMC_WRPROTECT_DISABLE (1 << 0)
#define TMIO_MMC_WRPROTECT_DISABLE BIT(0)
/*
* Some controllers can support a 2-byte block size when the bus width
* is configured in 4-bit mode.
*/
#define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
#define TMIO_MMC_BLKSZ_2BYTES BIT(1)
/*
* Some controllers can support SDIO IRQ signalling.
*/
#define TMIO_MMC_SDIO_IRQ (1 << 2)
#define TMIO_MMC_SDIO_IRQ BIT(2)
/* Some features are only available or tested on R-Car Gen2 or later */
#define TMIO_MMC_MIN_RCAR2 (1 << 3)
#define TMIO_MMC_MIN_RCAR2 BIT(3)
/*
* Some controllers require waiting for the SD bus to become
* idle before writing to some registers.
*/
#define TMIO_MMC_HAS_IDLE_WAIT (1 << 4)
#define TMIO_MMC_HAS_IDLE_WAIT BIT(4)
/*
* A GPIO is used for card hotplug detection. We need an extra flag for this,
* because 0 is a valid GPIO number too, and requiring users to specify
* cd_gpio < 0 to disable GPIO hotplug would break backwards compatibility.
*/
#define TMIO_MMC_USE_GPIO_CD (1 << 5)
#define TMIO_MMC_USE_GPIO_CD BIT(5)
/*
* Some controllers doesn't have over 0x100 register.
* it is used to checking accessibility of
* CTL_SD_CARD_CLK_CTL / CTL_CLK_AND_WAIT_CTL
*/
#define TMIO_MMC_HAVE_HIGH_REG (1 << 6)
#define TMIO_MMC_HAVE_HIGH_REG BIT(6)
/*
* Some controllers have CMD12 automatically
* issue/non-issue register
*/
#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7)
#define TMIO_MMC_HAVE_CMD12_CTRL BIT(7)
/* Controller has some SDIO status bits which must be 1 */
#define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8)
#define TMIO_MMC_SDIO_STATUS_SETBITS BIT(8)
/*
* Some controllers have a 32-bit wide data port register
*/
#define TMIO_MMC_32BIT_DATA_PORT (1 << 9)
#define TMIO_MMC_32BIT_DATA_PORT BIT(9)
/*
* Some controllers allows to set SDx actual clock
*/
#define TMIO_MMC_CLK_ACTUAL (1 << 10)
#define TMIO_MMC_CLK_ACTUAL BIT(10)
int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
@@ -146,9 +146,9 @@ struct tmio_nand_data {
struct tmio_fb_data {
int (*lcd_set_power)(struct platform_device *fb_dev,
bool on);
bool on);
int (*lcd_mode)(struct platform_device *fb_dev,
const struct fb_videomode *mode);
const struct fb_videomode *mode);
int num_modes;
struct fb_videomode *modes;
@@ -157,5 +157,4 @@ struct tmio_fb_data {
int width;
};
#endif