m68knommu: merge old ColdFire interrupt controller masking macros

Currently the code that supports setting the old style ColdFire interrupt
controller mask registers is macros in the include files of each of the
CPU types. Merge all these into a set of real masking functions in the
old Coldfire interrupt controller code proper. All the macros are basically
the same (excepting a register size difference on really early parts).

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer
2009-05-19 14:38:08 +10:00
parent 5187995f0a
commit f2154bef81
11 changed files with 109 additions and 140 deletions

View File

@@ -106,19 +106,6 @@
#define MCFGPIO_PIN_MAX 64
#define MCFGPIO_IRQ_MAX -1
#define MCFGPIO_IRQ_VECBASE -1
/*
* Macro to set IMR register. It is 32 bits on the 5249.
*/
#define MCFSIM_IMR_MASKALL 0x7fffe /* All SIM intr sources */
#define mcf_getimr() \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
#define mcf_setimr(imr) \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
#define mcf_getipr() \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
/****************************************************************************/