xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

powerpc/eeh: Make diag-data not endian dependent

Browse Source 
It's followup of commit ddf0322a ("powerpc/powernv: Fix endianness
problems in EEH"). The patch helps to get non-endian-dependent
diag-data.

Cc: Guo Chao <yan@linux.vnet.ibm.com>
Signed-off-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Gavin Shan
2014-07-17 14:41:42 +10:00
committed by Benjamin Herrenschmidt
parent 0dae27439a
commit f18440fb7e
3 changed files with 139 additions and 108 deletions
Download Patch File Download Diff File Expand all files Collapse all files

128
arch/powerpc/include/asm/opal.h
View File

@@ -513,40 +513,40 @@ enum {
};
struct OpalIoP7IOCErrorData {
uint16_t type;
__be16 type;
/* GEM */
uint64_t gemXfir;
uint64_t gemRfir;
uint64_t gemRirqfir;
uint64_t gemMask;
uint64_t gemRwof;
__be64 gemXfir;
__be64 gemRfir;
__be64 gemRirqfir;
__be64 gemMask;
__be64 gemRwof;
/* LEM */
uint64_t lemFir;
uint64_t lemErrMask;
uint64_t lemAction0;
uint64_t lemAction1;
uint64_t lemWof;
__be64 lemFir;
__be64 lemErrMask;
__be64 lemAction0;
__be64 lemAction1;
__be64 lemWof;
union {
struct OpalIoP7IOCRgcErrorData {
uint64_t rgcStatus; /* 3E1C10 */
uint64_t rgcLdcp; /* 3E1C18 */
__be64 rgcStatus; /* 3E1C10 */
__be64 rgcLdcp; /* 3E1C18 */
}rgc;
struct OpalIoP7IOCBiErrorData {
uint64_t biLdcp0; /* 3C0100, 3C0118 */
uint64_t biLdcp1; /* 3C0108, 3C0120 */
uint64_t biLdcp2; /* 3C0110, 3C0128 */
uint64_t biFenceStatus; /* 3C0130, 3C0130 */
__be64 biLdcp0; /* 3C0100, 3C0118 */
__be64 biLdcp1; /* 3C0108, 3C0120 */
__be64 biLdcp2; /* 3C0110, 3C0128 */
__be64 biFenceStatus; /* 3C0130, 3C0130 */
uint8_t biDownbound; /* BI Downbound or Upbound */
u8 biDownbound; /* BI Downbound or Upbound */
}bi;
struct OpalIoP7IOCCiErrorData {
uint64_t ciPortStatus; /* 3Dn008 */
uint64_t ciPortLdcp; /* 3Dn010 */
__be64 ciPortStatus; /* 3Dn008 */
__be64 ciPortLdcp; /* 3Dn010 */
uint8_t ciPort; /* Index of CI port: 0/1 */
u8 ciPort; /* Index of CI port: 0/1 */
}ci;
};
};
@@ -578,60 +578,60 @@ struct OpalIoPhbErrorCommon {
struct OpalIoP7IOCPhbErrorData {
struct OpalIoPhbErrorCommon common;
uint32_t brdgCtl;
__be32 brdgCtl;
// P7IOC utl regs
uint32_t portStatusReg;
uint32_t rootCmplxStatus;
uint32_t busAgentStatus;
__be32 portStatusReg;
__be32 rootCmplxStatus;
__be32 busAgentStatus;
// P7IOC cfg regs
uint32_t deviceStatus;
uint32_t slotStatus;
uint32_t linkStatus;
uint32_t devCmdStatus;
uint32_t devSecStatus;
__be32 deviceStatus;
__be32 slotStatus;
__be32 linkStatus;
__be32 devCmdStatus;
__be32 devSecStatus;
// cfg AER regs
uint32_t rootErrorStatus;
uint32_t uncorrErrorStatus;
uint32_t corrErrorStatus;
uint32_t tlpHdr1;
uint32_t tlpHdr2;
uint32_t tlpHdr3;
uint32_t tlpHdr4;
uint32_t sourceId;
__be32 rootErrorStatus;
__be32 uncorrErrorStatus;
__be32 corrErrorStatus;
__be32 tlpHdr1;
__be32 tlpHdr2;
__be32 tlpHdr3;
__be32 tlpHdr4;
__be32 sourceId;
uint32_t rsv3;
__be32 rsv3;
// Record data about the call to allocate a buffer.
uint64_t errorClass;
uint64_t correlator;
__be64 errorClass;
__be64 correlator;
//P7IOC MMIO Error Regs
uint64_t p7iocPlssr; // n120
uint64_t p7iocCsr; // n110
uint64_t lemFir; // nC00
uint64_t lemErrorMask; // nC18
uint64_t lemWOF; // nC40
uint64_t phbErrorStatus; // nC80
uint64_t phbFirstErrorStatus; // nC88
uint64_t phbErrorLog0; // nCC0
uint64_t phbErrorLog1; // nCC8
uint64_t mmioErrorStatus; // nD00
uint64_t mmioFirstErrorStatus; // nD08
uint64_t mmioErrorLog0; // nD40
uint64_t mmioErrorLog1; // nD48
uint64_t dma0ErrorStatus; // nD80
uint64_t dma0FirstErrorStatus; // nD88
uint64_t dma0ErrorLog0; // nDC0
uint64_t dma0ErrorLog1; // nDC8
uint64_t dma1ErrorStatus; // nE00
uint64_t dma1FirstErrorStatus; // nE08
uint64_t dma1ErrorLog0; // nE40
uint64_t dma1ErrorLog1; // nE48
uint64_t pestA[OPAL_P7IOC_NUM_PEST_REGS];
uint64_t pestB[OPAL_P7IOC_NUM_PEST_REGS];
__be64 p7iocPlssr; // n120
__be64 p7iocCsr; // n110
__be64 lemFir; // nC00
__be64 lemErrorMask; // nC18
__be64 lemWOF; // nC40
__be64 phbErrorStatus; // nC80
__be64 phbFirstErrorStatus; // nC88
__be64 phbErrorLog0; // nCC0
__be64 phbErrorLog1; // nCC8
__be64 mmioErrorStatus; // nD00
__be64 mmioFirstErrorStatus; // nD08
__be64 mmioErrorLog0; // nD40
__be64 mmioErrorLog1; // nD48
__be64 dma0ErrorStatus; // nD80
__be64 dma0FirstErrorStatus; // nD88
__be64 dma0ErrorLog0; // nDC0
__be64 dma0ErrorLog1; // nDC8
__be64 dma1ErrorStatus; // nE00
__be64 dma1FirstErrorStatus; // nE08
__be64 dma1ErrorLog0; // nE40
__be64 dma1ErrorLog1; // nE48
__be64 pestA[OPAL_P7IOC_NUM_PEST_REGS];
__be64 pestB[OPAL_P7IOC_NUM_PEST_REGS];
};
struct OpalIoPhb3ErrorData {