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phy: pipe3: insert delay to enumerate in GEN2 mode

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8-bit delay value (0xF1) is required for GEN2 devices to be enumerated
consistently. Added an API to be called from PHY drivers to set this delay
value and called it from PIPE3 driver to set the delay value.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
This commit is contained in:
Kishon Vijay Abraham I
2014-06-25 23:22:57 +05:30
parent 99bbd48c20
commit f0e2cf7b91
4 changed files with 71 additions and 7 deletions
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4
drivers/phy/phy-ti-pipe3.c
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@@ -217,8 +217,10 @@ static int ti_pipe3_init(struct phy *x)
u32 val;
int ret = 0;
if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie"))
if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-pcie")) {
omap_control_pcie_pcs(phy->control_dev, phy->id, 0xF1);
return 0;
}
/* Bring it out of IDLE if it is IDLE */
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);