BackMerge v5.1-rc5 into drm-next

Need rc5 for udl fix to add udl cleanups on top.

Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
2019-04-15 15:51:49 +10:00
1017 changed files with 11270 additions and 10110 deletions

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@@ -4829,6 +4829,7 @@ static void handle_cursor_update(struct drm_plane *plane,
amdgpu_crtc->cursor_width = plane->state->crtc_w;
amdgpu_crtc->cursor_height = plane->state->crtc_h;
memset(&attributes, 0, sizeof(attributes));
attributes.address.high_part = upper_32_bits(address);
attributes.address.low_part = lower_32_bits(address);
attributes.width = plane->state->crtc_w;
@@ -5757,9 +5758,11 @@ static void get_freesync_config_for_crtc(
struct amdgpu_dm_connector *aconnector =
to_amdgpu_dm_connector(new_con_state->base.connector);
struct drm_display_mode *mode = &new_crtc_state->base.mode;
int vrefresh = drm_mode_vrefresh(mode);
new_crtc_state->vrr_supported = new_con_state->freesync_capable &&
aconnector->min_vfreq <= drm_mode_vrefresh(mode);
vrefresh >= aconnector->min_vfreq &&
vrefresh <= aconnector->max_vfreq;
if (new_crtc_state->vrr_supported) {
new_crtc_state->stream->ignore_msa_timing_param = true;

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@@ -2673,12 +2673,18 @@ void core_link_enable_stream(
void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option)
{
struct dc *core_dc = pipe_ctx->stream->ctx->dc;
struct dc_stream_state *stream = pipe_ctx->stream;
core_dc->hwss.blank_stream(pipe_ctx);
if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
deallocate_mst_payload(pipe_ctx);
if (dc_is_hdmi_signal(pipe_ctx->stream->signal))
dal_ddc_service_write_scdc_data(
stream->link->ddc, 0,
stream->timing.flags.LTE_340MCSC_SCRAMBLE);
core_dc->hwss.disable_stream(pipe_ctx, option);
disable_link(pipe_ctx->stream->link, pipe_ctx->stream->signal);

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@@ -1150,28 +1150,9 @@ void hubp1_cursor_set_position(
REG_UPDATE(CURSOR_CONTROL,
CURSOR_ENABLE, cur_en);
//account for cases where we see negative offset relative to overlay plane
if (src_x_offset < 0 && src_y_offset < 0) {
REG_SET_2(CURSOR_POSITION, 0,
CURSOR_X_POSITION, 0,
CURSOR_Y_POSITION, 0);
x_hotspot -= src_x_offset;
y_hotspot -= src_y_offset;
} else if (src_x_offset < 0) {
REG_SET_2(CURSOR_POSITION, 0,
CURSOR_X_POSITION, 0,
CURSOR_Y_POSITION, pos->y);
x_hotspot -= src_x_offset;
} else if (src_y_offset < 0) {
REG_SET_2(CURSOR_POSITION, 0,
REG_SET_2(CURSOR_POSITION, 0,
CURSOR_X_POSITION, pos->x,
CURSOR_Y_POSITION, 0);
y_hotspot -= src_y_offset;
} else {
REG_SET_2(CURSOR_POSITION, 0,
CURSOR_X_POSITION, pos->x,
CURSOR_Y_POSITION, pos->y);
}
CURSOR_Y_POSITION, pos->y);
REG_SET_2(CURSOR_HOT_SPOT, 0,
CURSOR_HOT_SPOT_X, x_hotspot,