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Merge branch 'lorenzo/pci/dwc'

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- reduce Keystone "link already up" log level (Fabio Estevam)

  - move private DT functions to drivers/pci/ (Rob Herring)

  - factor out dwc CONFIG_PCI Kconfig dependencies (Rob Herring)

  - add DesignWare support to the endpoint test driver (Gustavo Pimentel)

  - add DesignWare support for endpoint mode (Gustavo Pimentel)

  - use devm_ioremap_resource() instead of devm_ioremap() in dra7xx and
    artpec6 (Gustavo Pimentel)

  - fix Qualcomm bitwise NOT issue (Dan Carpenter)

  - add Qualcomm runtime PM support (Srinivas Kandagatla)

* lorenzo/pci/dwc:
  PCI: qcom: add runtime pm support to pcie_port
  PCI: qcom: Fix a bitwise vs logical NOT typo
  PCI: dwc: dra7xx: Use devm_ioremap_resource() instead of devm_ioremap()
  PCI: dwc: artpec6: Use devm_ioremap_resource() instead of devm_ioremap()
  misc: pci_endpoint_test: Add DesignWare EP entry
  dt-bindings: PCI: designware: Add support for EP in DesignWare driver
  PCI: dwc: Add support for EP mode
  dt-bindings: PCI: designware: Example update
  PCI: Move private DT related functions into private header
  PCI: dwc: Move CONFIG_PCI depends to menu
  PCI: dwc: Replace magic number by defines
  PCI: dwc: Small computation improvement
  PCI: dwc: Replace lower into upper case characters
  PCI: dwc: Define maximum number of vectors
  PCI: imx6: Remove space before tabs
  PCI: keystone: Do not treat link up message as error

# Conflicts:
#	include/linux/of_pci.h
This commit is contained in:
Bjorn Helgaas
2018-06-06 16:10:27 -05:00
parent bdc4bb1377 854b69efbd
commit f03c7aa459
32 changed files with 371 additions and 141 deletions
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24
Documentation/devicetree/bindings/pci/designware-pcie.txt
View File

@@ -1,7 +1,9 @@
* Synopsys DesignWare PCIe interface
Required properties:
- compatible: should contain "snps,dw-pcie" to identify the core.
- compatible:
"snps,dw-pcie" for RC mode;
"snps,dw-pcie-ep" for EP mode;
- reg: Should contain the configuration address space.
- reg-names: Must be "config" for the PCIe configuration space.
(The old way of getting the configuration address space from "ranges"
@@ -41,11 +43,11 @@ EP mode:
Example configuration:
pcie: pcie@dffff000 {
pcie: pcie@dfc00000 {
compatible = "snps,dw-pcie";
reg = <0xdffff000 0x1000>, /* Controller registers */
<0xd0000000 0x2000>; /* PCI config space */
reg-names = "ctrlreg", "config";
reg = <0xdfc00000 0x0001000>, /* IP registers */
<0xd0000000 0x0002000>; /* Configuration space */
reg-names = "dbi", "config";
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
@@ -54,5 +56,15 @@ Example configuration:
interrupts = <25>, <24>;
#interrupt-cells = <1>;
num-lanes = <1>;
num-viewport = <3>;
};
or
pcie: pcie@dfc00000 {
compatible = "snps,dw-pcie-ep";
reg = <0xdfc00000 0x0001000>, /* IP registers 1 */
<0xdfc01000 0x0001000>, /* IP registers 2 */
<0xd0000000 0x2000000>; /* Configuration space */
reg-names = "dbi", "dbi2", "addr_space";
num-ib-windows = <6>;
num-ob-windows = <2>;
num-lanes = <1>;
};