drm/i915/kbl: Introduce Kabylake platform defition.
Kabylake is a Intel® Processor containing Intel® HD Graphics following Skylake. It is Gen9p5, so it inherits everything from Skylake. Let's start by adding the platform separated from Skylake but reusing most of all features, functions etc. Later we rebase the PCI-ID patch without is_skylake=1 so we don't replace what original Author did there. Few IS_SKYLAKEs if statements are not being covered by this patch on purpose: - Workarounds: Kabylake is derivated from Skylake H0 so no W/As apply here. - GuC: A following patch removes Kabylake support with an explanation: No firmware available yet. - DMC/CSR: Done in a separated patch since we need to be carefull and load the version for revision 7 since Kabylake is Skylake H0. v2: relative cleaner commit message and added the missed IS_KABYLAKE to intel_i2c.c as pointed out by Jani. Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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Jani Nikula

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7526ac195c
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ef11bdb3e0
@@ -74,7 +74,7 @@ static const struct gmbus_pin *get_gmbus_pin(struct drm_i915_private *dev_priv,
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{
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if (IS_BROXTON(dev_priv))
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return &gmbus_pins_bxt[pin];
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else if (IS_SKYLAKE(dev_priv))
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else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
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return &gmbus_pins_skl[pin];
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else if (IS_BROADWELL(dev_priv))
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return &gmbus_pins_bdw[pin];
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@@ -89,7 +89,7 @@ bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
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if (IS_BROXTON(dev_priv))
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size = ARRAY_SIZE(gmbus_pins_bxt);
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else if (IS_SKYLAKE(dev_priv))
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else if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv))
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size = ARRAY_SIZE(gmbus_pins_skl);
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else if (IS_BROADWELL(dev_priv))
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size = ARRAY_SIZE(gmbus_pins_bdw);
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