sfc: Remove workaround for old firmware bug
There was a bug in XAUI synchronisation in early 10Xpress firmware versions. This is fixed in released firmware and we do not need to work around it. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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committed by
Jeff Garzik

parent
e1074a0d96
commit
ef08af03ef
@@ -78,79 +78,7 @@ static void falcon_setup_xaui(struct efx_nic *efx)
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falcon_write(efx, &txdrv, XX_TXDRV_CTL_REG);
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}
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static void falcon_hold_xaui_in_rst(struct efx_nic *efx)
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{
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efx_oword_t reg;
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EFX_ZERO_OWORD(reg);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNA_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNB_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNC_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDND_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RSTPLLAB_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RSTPLLCD_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RESETA_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RESETB_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RESETC_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RESETD_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RSTXGXSRX_EN, 1);
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EFX_SET_OWORD_FIELD(reg, XX_RSTXGXSTX_EN, 1);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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}
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static int _falcon_reset_xaui_a(struct efx_nic *efx)
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{
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efx_oword_t reg;
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falcon_hold_xaui_in_rst(efx);
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falcon_read(efx, ®, XX_PWR_RST_REG);
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/* Follow the RAMBUS XAUI data reset sequencing
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* Channels A and B first: power down, reset PLL, reset, clear
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*/
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNA_EN, 0);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNB_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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EFX_SET_OWORD_FIELD(reg, XX_RSTPLLAB_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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EFX_SET_OWORD_FIELD(reg, XX_RESETA_EN, 0);
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EFX_SET_OWORD_FIELD(reg, XX_RESETB_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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/* Channels C and D: power down, reset PLL, reset, clear */
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EFX_SET_OWORD_FIELD(reg, XX_PWRDNC_EN, 0);
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EFX_SET_OWORD_FIELD(reg, XX_PWRDND_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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EFX_SET_OWORD_FIELD(reg, XX_RSTPLLCD_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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EFX_SET_OWORD_FIELD(reg, XX_RESETC_EN, 0);
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EFX_SET_OWORD_FIELD(reg, XX_RESETD_EN, 0);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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/* Setup XAUI */
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falcon_setup_xaui(efx);
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udelay(10);
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/* Take XGXS out of reset */
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EFX_ZERO_OWORD(reg);
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falcon_write(efx, ®, XX_PWR_RST_REG);
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udelay(10);
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return 0;
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}
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static int _falcon_reset_xaui_b(struct efx_nic *efx)
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int falcon_reset_xaui(struct efx_nic *efx)
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{
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efx_oword_t reg;
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int count;
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@@ -171,20 +99,6 @@ static int _falcon_reset_xaui_b(struct efx_nic *efx)
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return -ETIMEDOUT;
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}
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int falcon_reset_xaui(struct efx_nic *efx)
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{
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int rc;
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if (EFX_WORKAROUND_9388(efx)) {
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falcon_hold_xaui_in_rst(efx);
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efx->phy_op->reset_xaui(efx);
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rc = _falcon_reset_xaui_a(efx);
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} else {
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rc = _falcon_reset_xaui_b(efx);
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}
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return rc;
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}
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static bool falcon_xgmii_status(struct efx_nic *efx)
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{
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efx_oword_t reg;
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