xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

iio: adc: adi-axi-adc: add support for AXI ADC IP core

Browse Source 
This change adds support for the Analog Devices Generic AXI ADC IP core.
The IP core is used for interfacing with analog-to-digital (ADC) converters
that require either a high-speed serial interface (JESD204B/C) or a source
synchronous parallel interface (LVDS/CMOS).

Usually, some other interface type (i.e SPI) is used as a control interface
for the actual ADC, while the IP core (controlled via this driver), will
interface to the data-lines of the ADC and handle  the streaming of data
into memory via DMA.

Because of this, the AXI ADC driver needs the other SPI-ADC driver to
register with it. The SPI-ADC needs to be register via the SPI framework,
while the AXI ADC registers as a platform driver. The two cannot be ordered
in a hierarchy as both drivers have their own registers, and trying to
organize this [in a hierarchy becomes] problematic when trying to map
memory/registers.

There are some modes where the AXI ADC can operate as standalone ADC, but
those will be implemented at a later point in time.

DocLink: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Michael Hennerich
2020-03-24 15:46:33 +02:00
committed by Jonathan Cameron
parent e0fcca9fbd
commit ef04070692
4 changed files with 567 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

64
include/linux/iio/adc/adi-axi-adc.h Normal file
View File

@@ -0,0 +1,64 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Analog Devices Generic AXI ADC IP core driver/library
* Link: https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
*
* Copyright 2012-2020 Analog Devices Inc.
*/
#ifndef __ADI_AXI_ADC_H__
#define __ADI_AXI_ADC_H__
struct device;
struct iio_chan_spec;
/**
* struct adi_axi_adc_chip_info - Chip specific information
* @name Chip name
* @id Chip ID (usually product ID)
* @channels Channel specifications of type @struct axi_adc_chan_spec
* @num_channels Number of @channels
* @scale_table Supported scales by the chip; tuples of 2 ints
* @num_scales Number of scales in the table
* @max_rate Maximum sampling rate supported by the device
*/
struct adi_axi_adc_chip_info {
const char *name;
unsigned int id;
const struct iio_chan_spec *channels;
unsigned int num_channels;
const unsigned int (*scale_table)[2];
int num_scales;
unsigned long max_rate;
};
/**
* struct adi_axi_adc_conv - data of the ADC attached to the AXI ADC
* @chip_info chip info details for the client ADC
* @preenable_setup op to run in the client before enabling the AXI ADC
* @reg_access IIO debugfs_reg_access hook for the client ADC
* @read_raw IIO read_raw hook for the client ADC
* @write_raw IIO write_raw hook for the client ADC
*/
struct adi_axi_adc_conv {
const struct adi_axi_adc_chip_info *chip_info;
int (*preenable_setup)(struct adi_axi_adc_conv *conv);
int (*reg_access)(struct adi_axi_adc_conv *conv, unsigned int reg,
unsigned int writeval, unsigned int *readval);
int (*read_raw)(struct adi_axi_adc_conv *conv,
struct iio_chan_spec const *chan,
int *val, int *val2, long mask);
int (*write_raw)(struct adi_axi_adc_conv *conv,
struct iio_chan_spec const *chan,
int val, int val2, long mask);
};
struct adi_axi_adc_conv *devm_adi_axi_adc_conv_register(struct device *dev,
size_t sizeof_priv);
void *adi_axi_adc_conv_priv(struct adi_axi_adc_conv *conv);
#endif