Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Several cases of overlapping changes, except the packet scheduler conflicts which deal with the addition of the free list parameter to qdisc_enqueue(). Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -24,6 +24,7 @@
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#include <linux/of.h>
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#include <linux/gpio.h>
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#include <linux/seqlock.h>
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#include <linux/idr.h>
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#include "swphy.h"
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@@ -189,6 +190,8 @@ err_regs:
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}
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EXPORT_SYMBOL_GPL(fixed_phy_add);
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static DEFINE_IDA(phy_fixed_ida);
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static void fixed_phy_del(int phy_addr)
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{
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struct fixed_mdio_bus *fmb = &platform_fmb;
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@@ -200,14 +203,12 @@ static void fixed_phy_del(int phy_addr)
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if (gpio_is_valid(fp->link_gpio))
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gpio_free(fp->link_gpio);
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kfree(fp);
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ida_simple_remove(&phy_fixed_ida, phy_addr);
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return;
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}
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}
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}
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static int phy_fixed_addr;
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static DEFINE_SPINLOCK(phy_fixed_addr_lock);
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struct phy_device *fixed_phy_register(unsigned int irq,
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struct fixed_phy_status *status,
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int link_gpio,
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@@ -222,17 +223,15 @@ struct phy_device *fixed_phy_register(unsigned int irq,
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return ERR_PTR(-EPROBE_DEFER);
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/* Get the next available PHY address, up to PHY_MAX_ADDR */
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spin_lock(&phy_fixed_addr_lock);
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if (phy_fixed_addr == PHY_MAX_ADDR) {
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spin_unlock(&phy_fixed_addr_lock);
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return ERR_PTR(-ENOSPC);
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}
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phy_addr = phy_fixed_addr++;
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spin_unlock(&phy_fixed_addr_lock);
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phy_addr = ida_simple_get(&phy_fixed_ida, 0, PHY_MAX_ADDR, GFP_KERNEL);
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if (phy_addr < 0)
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return ERR_PTR(phy_addr);
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ret = fixed_phy_add(irq, phy_addr, status, link_gpio);
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if (ret < 0)
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if (ret < 0) {
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ida_simple_remove(&phy_fixed_ida, phy_addr);
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return ERR_PTR(ret);
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}
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phy = get_phy_device(fmb->mii_bus, phy_addr, false);
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if (IS_ERR(phy)) {
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@@ -337,6 +336,7 @@ static void __exit fixed_mdio_bus_exit(void)
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list_del(&fp->node);
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kfree(fp);
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}
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ida_destroy(&phy_fixed_ida);
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}
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module_exit(fixed_mdio_bus_exit);
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@@ -285,6 +285,48 @@ static int marvell_config_aneg(struct phy_device *phydev)
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return 0;
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}
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static int m88e1111_config_aneg(struct phy_device *phydev)
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{
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int err;
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/* The Marvell PHY has an errata which requires
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* that certain registers get written in order
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* to restart autonegotiation
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*/
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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err = marvell_set_polarity(phydev, phydev->mdix);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
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MII_M1111_PHY_LED_DIRECT);
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if (err < 0)
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return err;
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err = genphy_config_aneg(phydev);
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if (err < 0)
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return err;
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if (phydev->autoneg != AUTONEG_ENABLE) {
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int bmcr;
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/* A write to speed/duplex bits (that is performed by
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* genphy_config_aneg() call above) must be followed by
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* a software reset. Otherwise, the write has no effect.
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*/
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bmcr = phy_read(phydev, MII_BMCR);
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if (bmcr < 0)
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return bmcr;
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err = phy_write(phydev, MII_BMCR, bmcr | BMCR_RESET);
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if (err < 0)
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return err;
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}
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return 0;
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}
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#ifdef CONFIG_OF_MDIO
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/*
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* Set and/or override some configuration registers based on the
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@@ -407,15 +449,7 @@ static int m88e1121_config_aneg(struct phy_device *phydev)
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if (err < 0)
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return err;
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oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
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phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
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phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF);
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phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
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err = genphy_config_aneg(phydev);
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return err;
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return genphy_config_aneg(phydev);
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}
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static int m88e1318_config_aneg(struct phy_device *phydev)
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@@ -636,6 +670,28 @@ static int m88e1111_config_init(struct phy_device *phydev)
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return phy_write(phydev, MII_BMCR, BMCR_RESET);
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}
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static int m88e1121_config_init(struct phy_device *phydev)
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{
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int err, oldpage;
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oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
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if (err < 0)
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return err;
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/* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
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err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
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MII_88E1121_PHY_LED_DEF);
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if (err < 0)
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return err;
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phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
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/* Set marvell,reg-init configuration from device tree */
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return marvell_config_init(phydev);
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}
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static int m88e1510_config_init(struct phy_device *phydev)
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{
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int err;
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@@ -668,7 +724,7 @@ static int m88e1510_config_init(struct phy_device *phydev)
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return err;
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}
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return marvell_config_init(phydev);
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return m88e1121_config_init(phydev);
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}
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static int m88e1118_config_aneg(struct phy_device *phydev)
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@@ -1161,7 +1217,7 @@ static struct phy_driver marvell_drivers[] = {
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.flags = PHY_HAS_INTERRUPT,
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.probe = marvell_probe,
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.config_init = &m88e1111_config_init,
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.config_aneg = &marvell_config_aneg,
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.config_aneg = &m88e1111_config_aneg,
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.read_status = &marvell_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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.config_intr = &marvell_config_intr,
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@@ -1196,7 +1252,7 @@ static struct phy_driver marvell_drivers[] = {
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.probe = marvell_probe,
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.config_init = &marvell_config_init,
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.config_init = &m88e1121_config_init,
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.config_aneg = &m88e1121_config_aneg,
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.read_status = &marvell_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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@@ -1215,7 +1271,7 @@ static struct phy_driver marvell_drivers[] = {
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.probe = marvell_probe,
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.config_init = &marvell_config_init,
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.config_init = &m88e1121_config_init,
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.config_aneg = &m88e1318_config_aneg,
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.read_status = &marvell_read_status,
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.ack_interrupt = &marvell_ack_interrupt,
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@@ -75,22 +75,13 @@ static int smsc_phy_reset(struct phy_device *phydev)
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* in all capable mode before using it.
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*/
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if ((rc & MII_LAN83C185_MODE_MASK) == MII_LAN83C185_MODE_POWERDOWN) {
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int timeout = 50000;
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/* set "all capable" mode and reset the phy */
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/* set "all capable" mode */
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rc |= MII_LAN83C185_MODE_ALL;
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phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc);
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phy_write(phydev, MII_BMCR, BMCR_RESET);
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/* wait end of reset (max 500 ms) */
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do {
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udelay(10);
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if (timeout-- == 0)
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return -1;
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rc = phy_read(phydev, MII_BMCR);
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} while (rc & BMCR_RESET);
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}
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return 0;
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/* reset the phy */
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return genphy_soft_reset(phydev);
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}
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static int lan911x_config_init(struct phy_device *phydev)
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