i386: move kernel/cpu/cpufreq
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
这个提交包含在：
Thomas Gleixner
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/*
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* (C) 2001 Dave Jones, Arjan van de ven.
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* (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
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*
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* Licensed under the terms of the GNU GPL License version 2.
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* Based upon reverse engineered information, and on Intel documentation
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* for chipsets ICH2-M and ICH3-M.
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*
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* Many thanks to Ducrot Bruno for finding and fixing the last
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* "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
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* for extensive testing.
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*
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* BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
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*/
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/*********************************************************************
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* SPEEDSTEP - DEFINITIONS *
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*********************************************************************/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/cpufreq.h>
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#include <linux/pci.h>
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#include <linux/slab.h>
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#include <linux/sched.h>
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#include "speedstep-lib.h"
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/* speedstep_chipset:
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* It is necessary to know which chipset is used. As accesses to
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* this device occur at various places in this module, we need a
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* static struct pci_dev * pointing to that device.
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*/
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static struct pci_dev *speedstep_chipset_dev;
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/* speedstep_processor
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*/
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static unsigned int speedstep_processor = 0;
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static u32 pmbase;
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/*
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* There are only two frequency states for each processor. Values
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* are in kHz for the time being.
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*/
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static struct cpufreq_frequency_table speedstep_freqs[] = {
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{SPEEDSTEP_HIGH, 0},
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{SPEEDSTEP_LOW, 0},
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{0, CPUFREQ_TABLE_END},
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};
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#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "speedstep-ich", msg)
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/**
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* speedstep_find_register - read the PMBASE address
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*
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* Returns: -ENODEV if no register could be found
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*/
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static int speedstep_find_register (void)
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{
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if (!speedstep_chipset_dev)
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return -ENODEV;
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/* get PMBASE */
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pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
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if (!(pmbase & 0x01)) {
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printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
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return -ENODEV;
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}
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pmbase &= 0xFFFFFFFE;
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if (!pmbase) {
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printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
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return -ENODEV;
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}
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dprintk("pmbase is 0x%x\n", pmbase);
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return 0;
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}
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/**
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* speedstep_set_state - set the SpeedStep state
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* @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
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*
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* Tries to change the SpeedStep state.
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*/
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static void speedstep_set_state (unsigned int state)
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{
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u8 pm2_blk;
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u8 value;
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unsigned long flags;
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if (state > 0x1)
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return;
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/* Disable IRQs */
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local_irq_save(flags);
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/* read state */
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value = inb(pmbase + 0x50);
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dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
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/* write new state */
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value &= 0xFE;
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value |= state;
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dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
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/* Disable bus master arbitration */
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pm2_blk = inb(pmbase + 0x20);
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pm2_blk |= 0x01;
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outb(pm2_blk, (pmbase + 0x20));
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/* Actual transition */
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outb(value, (pmbase + 0x50));
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/* Restore bus master arbitration */
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pm2_blk &= 0xfe;
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outb(pm2_blk, (pmbase + 0x20));
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/* check if transition was successful */
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value = inb(pmbase + 0x50);
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/* Enable IRQs */
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local_irq_restore(flags);
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dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
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if (state == (value & 0x1)) {
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dprintk("change to %u MHz succeeded\n", (speedstep_get_processor_frequency(speedstep_processor) / 1000));
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} else {
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printk (KERN_ERR "cpufreq: change failed - I/O error\n");
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}
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return;
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}
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/**
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* speedstep_activate - activate SpeedStep control in the chipset
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*
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* Tries to activate the SpeedStep status and control registers.
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* Returns -EINVAL on an unsupported chipset, and zero on success.
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*/
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static int speedstep_activate (void)
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{
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u16 value = 0;
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if (!speedstep_chipset_dev)
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return -EINVAL;
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pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
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if (!(value & 0x08)) {
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value |= 0x08;
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dprintk("activating SpeedStep (TM) registers\n");
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pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
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}
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return 0;
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}
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/**
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* speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
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*
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* Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
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* the LPC bridge / PM module which contains all power-management
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* functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
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* chipset, or zero on failure.
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*/
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static unsigned int speedstep_detect_chipset (void)
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{
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speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801DB_12,
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PCI_ANY_ID,
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PCI_ANY_ID,
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NULL);
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if (speedstep_chipset_dev)
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return 4; /* 4-M */
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speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801CA_12,
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PCI_ANY_ID,
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PCI_ANY_ID,
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NULL);
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if (speedstep_chipset_dev)
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return 3; /* 3-M */
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speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82801BA_10,
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PCI_ANY_ID,
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PCI_ANY_ID,
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NULL);
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if (speedstep_chipset_dev) {
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/* speedstep.c causes lockups on Dell Inspirons 8000 and
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* 8100 which use a pretty old revision of the 82815
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* host brige. Abort on these systems.
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*/
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static struct pci_dev *hostbridge;
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hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
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PCI_DEVICE_ID_INTEL_82815_MC,
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PCI_ANY_ID,
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PCI_ANY_ID,
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NULL);
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if (!hostbridge)
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return 2; /* 2-M */
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if (hostbridge->revision < 5) {
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dprintk("hostbridge does not support speedstep\n");
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speedstep_chipset_dev = NULL;
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pci_dev_put(hostbridge);
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return 0;
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}
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pci_dev_put(hostbridge);
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return 2; /* 2-M */
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}
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return 0;
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}
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static unsigned int _speedstep_get(cpumask_t cpus)
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{
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unsigned int speed;
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cpumask_t cpus_allowed;
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cpus_allowed = current->cpus_allowed;
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set_cpus_allowed(current, cpus);
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speed = speedstep_get_processor_frequency(speedstep_processor);
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set_cpus_allowed(current, cpus_allowed);
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dprintk("detected %u kHz as current frequency\n", speed);
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return speed;
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}
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static unsigned int speedstep_get(unsigned int cpu)
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{
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return _speedstep_get(cpumask_of_cpu(cpu));
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}
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/**
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* speedstep_target - set a new CPUFreq policy
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* @policy: new policy
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* @target_freq: the target frequency
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* @relation: how that frequency relates to achieved frequency (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
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*
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* Sets a new CPUFreq policy.
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*/
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static int speedstep_target (struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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unsigned int newstate = 0;
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struct cpufreq_freqs freqs;
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cpumask_t cpus_allowed;
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int i;
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if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0], target_freq, relation, &newstate))
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return -EINVAL;
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freqs.old = _speedstep_get(policy->cpus);
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freqs.new = speedstep_freqs[newstate].frequency;
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freqs.cpu = policy->cpu;
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dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
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/* no transition necessary */
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if (freqs.old == freqs.new)
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return 0;
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cpus_allowed = current->cpus_allowed;
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for_each_cpu_mask(i, policy->cpus) {
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freqs.cpu = i;
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cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
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}
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/* switch to physical CPU where state is to be changed */
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set_cpus_allowed(current, policy->cpus);
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speedstep_set_state(newstate);
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/* allow to be run on all CPUs */
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set_cpus_allowed(current, cpus_allowed);
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for_each_cpu_mask(i, policy->cpus) {
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freqs.cpu = i;
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cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
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}
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return 0;
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}
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/**
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* speedstep_verify - verifies a new CPUFreq policy
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* @policy: new policy
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*
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* Limit must be within speedstep_low_freq and speedstep_high_freq, with
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* at least one border included.
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*/
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static int speedstep_verify (struct cpufreq_policy *policy)
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{
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return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
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}
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static int speedstep_cpu_init(struct cpufreq_policy *policy)
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{
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int result = 0;
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unsigned int speed;
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cpumask_t cpus_allowed;
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/* only run on CPU to be set, or on its sibling */
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#ifdef CONFIG_SMP
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policy->cpus = cpu_sibling_map[policy->cpu];
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#endif
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cpus_allowed = current->cpus_allowed;
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set_cpus_allowed(current, policy->cpus);
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/* detect low and high frequency and transition latency */
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result = speedstep_get_freqs(speedstep_processor,
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&speedstep_freqs[SPEEDSTEP_LOW].frequency,
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&speedstep_freqs[SPEEDSTEP_HIGH].frequency,
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&policy->cpuinfo.transition_latency,
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&speedstep_set_state);
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set_cpus_allowed(current, cpus_allowed);
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if (result)
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return result;
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/* get current speed setting */
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speed = _speedstep_get(policy->cpus);
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if (!speed)
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return -EIO;
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dprintk("currently at %s speed setting - %i MHz\n",
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(speed == speedstep_freqs[SPEEDSTEP_LOW].frequency) ? "low" : "high",
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(speed / 1000));
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/* cpuinfo and default policy values */
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policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
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policy->cur = speed;
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result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
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if (result)
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return (result);
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cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
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return 0;
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}
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static int speedstep_cpu_exit(struct cpufreq_policy *policy)
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{
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cpufreq_frequency_table_put_attr(policy->cpu);
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return 0;
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}
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static struct freq_attr* speedstep_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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NULL,
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};
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static struct cpufreq_driver speedstep_driver = {
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.name = "speedstep-ich",
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.verify = speedstep_verify,
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.target = speedstep_target,
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.init = speedstep_cpu_init,
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.exit = speedstep_cpu_exit,
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.get = speedstep_get,
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.owner = THIS_MODULE,
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.attr = speedstep_attr,
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};
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/**
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* speedstep_init - initializes the SpeedStep CPUFreq driver
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*
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* Initializes the SpeedStep support. Returns -ENODEV on unsupported
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* devices, -EINVAL on problems during initiatization, and zero on
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* success.
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*/
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static int __init speedstep_init(void)
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{
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/* detect processor */
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speedstep_processor = speedstep_detect_processor();
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if (!speedstep_processor) {
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dprintk("Intel(R) SpeedStep(TM) capable processor not found\n");
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return -ENODEV;
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}
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/* detect chipset */
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if (!speedstep_detect_chipset()) {
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dprintk("Intel(R) SpeedStep(TM) for this chipset not (yet) available.\n");
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return -ENODEV;
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}
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/* activate speedstep support */
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if (speedstep_activate()) {
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pci_dev_put(speedstep_chipset_dev);
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return -EINVAL;
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}
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if (speedstep_find_register())
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return -ENODEV;
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return cpufreq_register_driver(&speedstep_driver);
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}
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/**
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* speedstep_exit - unregisters SpeedStep support
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*
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* Unregisters SpeedStep support.
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*/
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static void __exit speedstep_exit(void)
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{
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pci_dev_put(speedstep_chipset_dev);
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cpufreq_unregister_driver(&speedstep_driver);
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}
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MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>, Dominik Brodowski <linux@brodo.de>");
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MODULE_DESCRIPTION ("Speedstep driver for Intel mobile processors on chipsets with ICH-M southbridges.");
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MODULE_LICENSE ("GPL");
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module_init(speedstep_init);
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module_exit(speedstep_exit);
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