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drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn

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Enable asic Verde, Tahiti and Pitcairn UVD block.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sonny Jiang
2020-06-10 16:24:21 -04:00
committed by Alex Deucher
parent d375615c24
commit ee2e74f7e1
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdgpu/si.c
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@@ -2197,7 +2197,7 @@ int si_set_ip_blocks(struct amdgpu_device *adev)
amdgpu_device_ip_block_add(adev, &dce_virtual_ip_block);
else
amdgpu_device_ip_block_add(adev, &dce_v6_0_ip_block);
/* amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block); */
amdgpu_device_ip_block_add(adev, &uvd_v3_1_ip_block);
/* amdgpu_device_ip_block_add(adev, &vce_v1_0_ip_block); */
break;
case CHIP_OLAND: