Merge branch 'linus' into x86/asm, to pick up fixes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
@@ -14,6 +14,16 @@
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#ifndef _ASM_X86_FIXMAP_H
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#define _ASM_X86_FIXMAP_H
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/*
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* Exposed to assembly code for setting up initial page tables. Cannot be
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* calculated in assembly code (fixmap entries are an enum), but is sanity
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* checked in the actual fixmap C code to make sure that the fixmap is
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* covered fully.
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*/
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#define FIXMAP_PMD_NUM 2
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/* fixmap starts downwards from the 507th entry in level2_fixmap_pgt */
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#define FIXMAP_PMD_TOP 507
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#ifndef __ASSEMBLY__
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#include <linux/kernel.h>
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#include <asm/acpi.h>
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@@ -726,19 +726,21 @@ struct hv_enlightened_vmcs {
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#define HV_STIMER_AUTOENABLE (1ULL << 3)
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#define HV_STIMER_SINT(config) (__u8)(((config) >> 16) & 0x0F)
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struct ipi_arg_non_ex {
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u32 vector;
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u32 reserved;
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u64 cpu_mask;
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};
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struct hv_vpset {
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u64 format;
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u64 valid_bank_mask;
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u64 bank_contents[];
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};
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struct ipi_arg_ex {
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/* HvCallSendSyntheticClusterIpi hypercall */
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struct hv_send_ipi {
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u32 vector;
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u32 reserved;
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u64 cpu_mask;
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};
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/* HvCallSendSyntheticClusterIpiEx hypercall */
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struct hv_send_ipi_ex {
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u32 vector;
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u32 reserved;
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struct hv_vpset vp_set;
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@@ -869,6 +869,8 @@ struct kvm_arch {
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bool x2apic_format;
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bool x2apic_broadcast_quirk_disabled;
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bool guest_can_read_msr_platform_info;
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};
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struct kvm_vm_stat {
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@@ -1022,6 +1024,7 @@ struct kvm_x86_ops {
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void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu);
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void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr);
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void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr);
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bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu);
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void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap);
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void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu);
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void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu, hpa_t hpa);
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@@ -1055,6 +1058,7 @@ struct kvm_x86_ops {
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bool (*umip_emulated)(void);
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int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr);
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void (*request_immediate_exit)(struct kvm_vcpu *vcpu);
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void (*sched_in)(struct kvm_vcpu *kvm, int cpu);
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@@ -1482,6 +1486,7 @@ extern bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn);
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int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu);
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int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err);
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void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu);
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int kvm_is_in_guest(void);
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@@ -48,10 +48,13 @@ int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size);
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/* Architecture __weak replacement functions */
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void __init mem_encrypt_init(void);
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void __init mem_encrypt_free_decrypted_mem(void);
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bool sme_active(void);
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bool sev_active(void);
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#define __bss_decrypted __attribute__((__section__(".bss..decrypted")))
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#else /* !CONFIG_AMD_MEM_ENCRYPT */
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#define sme_me_mask 0ULL
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@@ -77,6 +80,8 @@ early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0;
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static inline int __init
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early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0; }
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#define __bss_decrypted
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#endif /* CONFIG_AMD_MEM_ENCRYPT */
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/*
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@@ -88,6 +93,8 @@ early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0;
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#define __sme_pa(x) (__pa(x) | sme_me_mask)
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#define __sme_pa_nodebug(x) (__pa_nodebug(x) | sme_me_mask)
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extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[];
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#endif /* __ASSEMBLY__ */
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#endif /* __X86_MEM_ENCRYPT_H__ */
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@@ -46,6 +46,14 @@
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#define INTEL_ARCH_EVENT_MASK \
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(ARCH_PERFMON_EVENTSEL_UMASK | ARCH_PERFMON_EVENTSEL_EVENT)
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#define AMD64_L3_SLICE_SHIFT 48
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#define AMD64_L3_SLICE_MASK \
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((0xFULL) << AMD64_L3_SLICE_SHIFT)
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#define AMD64_L3_THREAD_SHIFT 56
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#define AMD64_L3_THREAD_MASK \
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((0xFFULL) << AMD64_L3_THREAD_SHIFT)
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#define X86_RAW_EVENT_MASK \
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(ARCH_PERFMON_EVENTSEL_EVENT | \
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ARCH_PERFMON_EVENTSEL_UMASK | \
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@@ -19,9 +19,6 @@ static inline void native_set_pte(pte_t *ptep , pte_t pte)
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static inline void native_set_pmd(pmd_t *pmdp, pmd_t pmd)
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{
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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pmd.pud.p4d.pgd = pti_set_user_pgtbl(&pmdp->pud.p4d.pgd, pmd.pud.p4d.pgd);
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#endif
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*pmdp = pmd;
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}
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@@ -61,9 +58,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
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#ifdef CONFIG_SMP
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static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
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{
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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pti_set_user_pgtbl(&xp->pud.p4d.pgd, __pgd(0));
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#endif
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return __pmd(xchg((pmdval_t *)xp, 0));
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}
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#else
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@@ -73,9 +67,6 @@ static inline pmd_t native_pmdp_get_and_clear(pmd_t *xp)
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#ifdef CONFIG_SMP
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static inline pud_t native_pudp_get_and_clear(pud_t *xp)
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{
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#ifdef CONFIG_PAGE_TABLE_ISOLATION
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pti_set_user_pgtbl(&xp->p4d.pgd, __pgd(0));
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#endif
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return __pud(xchg((pudval_t *)xp, 0));
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}
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#else
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@@ -14,6 +14,7 @@
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#include <asm/processor.h>
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#include <linux/bitops.h>
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#include <linux/threads.h>
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#include <asm/fixmap.h>
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extern p4d_t level4_kernel_pgt[512];
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extern p4d_t level4_ident_pgt[512];
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@@ -22,7 +23,7 @@ extern pud_t level3_ident_pgt[512];
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extern pmd_t level2_kernel_pgt[512];
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extern pmd_t level2_fixmap_pgt[512];
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extern pmd_t level2_ident_pgt[512];
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extern pte_t level1_fixmap_pgt[512];
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extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM];
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extern pgd_t init_top_pgt[];
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#define swapper_pg_dir init_top_pgt
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@@ -10,8 +10,13 @@ struct cpumask;
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struct mm_struct;
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#ifdef CONFIG_X86_UV
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#include <linux/efi.h>
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extern enum uv_system_type get_uv_system_type(void);
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static inline bool is_early_uv_system(void)
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{
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return !((efi.uv_systab == EFI_INVALID_TABLE_ADDR) || !efi.uv_systab);
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}
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extern int is_uv_system(void);
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extern int is_uv_hubless(void);
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extern void uv_cpu_init(void);
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@@ -23,6 +28,7 @@ extern const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
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#else /* X86_UV */
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static inline enum uv_system_type get_uv_system_type(void) { return UV_NONE; }
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static inline bool is_early_uv_system(void) { return 0; }
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static inline int is_uv_system(void) { return 0; }
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static inline int is_uv_hubless(void) { return 0; }
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static inline void uv_cpu_init(void) { }
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