ARM: OMAP2+: raw read and write endian fix
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
Цей коміт міститься в:

зафіксовано
Tony Lindgren

джерело
89ca3b8819
коміт
edfaf05c2f
@@ -151,32 +151,32 @@ void __iomem *omap_ctrl_base_get(void)
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u8 omap_ctrl_readb(u16 offset)
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{
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return __raw_readb(OMAP_CTRL_REGADDR(offset));
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return readb_relaxed(OMAP_CTRL_REGADDR(offset));
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}
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u16 omap_ctrl_readw(u16 offset)
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{
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return __raw_readw(OMAP_CTRL_REGADDR(offset));
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return readw_relaxed(OMAP_CTRL_REGADDR(offset));
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}
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u32 omap_ctrl_readl(u16 offset)
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{
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return __raw_readl(OMAP_CTRL_REGADDR(offset));
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return readl_relaxed(OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writeb(u8 val, u16 offset)
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{
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__raw_writeb(val, OMAP_CTRL_REGADDR(offset));
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writeb_relaxed(val, OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writew(u16 val, u16 offset)
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{
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__raw_writew(val, OMAP_CTRL_REGADDR(offset));
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writew_relaxed(val, OMAP_CTRL_REGADDR(offset));
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}
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void omap_ctrl_writel(u32 val, u16 offset)
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{
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__raw_writel(val, OMAP_CTRL_REGADDR(offset));
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writel_relaxed(val, OMAP_CTRL_REGADDR(offset));
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}
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/*
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@@ -188,12 +188,12 @@ void omap_ctrl_writel(u32 val, u16 offset)
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u32 omap4_ctrl_pad_readl(u16 offset)
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{
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return __raw_readl(OMAP4_CTRL_PAD_REGADDR(offset));
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return readl_relaxed(OMAP4_CTRL_PAD_REGADDR(offset));
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}
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void omap4_ctrl_pad_writel(u32 val, u16 offset)
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{
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__raw_writel(val, OMAP4_CTRL_PAD_REGADDR(offset));
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writel_relaxed(val, OMAP4_CTRL_PAD_REGADDR(offset));
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}
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#ifdef CONFIG_ARCH_OMAP3
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@@ -222,7 +222,7 @@ void omap3_ctrl_write_boot_mode(u8 bootmode)
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*
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* XXX This should use some omap_ctrl_writel()-type function
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*/
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__raw_writel(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
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writel_relaxed(l, OMAP2_L4_IO_ADDRESS(OMAP343X_SCRATCHPAD + 4));
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}
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#endif
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@@ -285,7 +285,7 @@ void omap3_clear_scratchpad_contents(void)
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if (omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP3_PRM_RSTST_OFFSET) &
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OMAP3430_GLOBAL_COLD_RST_MASK) {
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for ( ; offset <= max_offset; offset += 0x4)
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__raw_writel(0x0, (v_addr + offset));
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writel_relaxed(0x0, (v_addr + offset));
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omap2_prm_set_mod_reg_bits(OMAP3430_GLOBAL_COLD_RST_MASK,
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OMAP3430_GR_MOD,
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OMAP3_PRM_RSTST_OFFSET);
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