Merge tag 'kvm-s390-master-4.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux
KVM: s390: Fixes for 4.19 - Fallout from the hugetlbfs support: pfmf interpretion and locking - VSIE: fix keywrapping for nested guests
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@@ -33,7 +33,8 @@ extern inline unsigned long native_save_fl(void)
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return flags;
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}
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static inline void native_restore_fl(unsigned long flags)
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extern inline void native_restore_fl(unsigned long flags);
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extern inline void native_restore_fl(unsigned long flags)
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{
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asm volatile("push %0 ; popf"
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: /* no output */
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@@ -2,6 +2,8 @@
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#ifndef _ASM_X86_PGTABLE_3LEVEL_H
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#define _ASM_X86_PGTABLE_3LEVEL_H
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#include <asm/atomic64_32.h>
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/*
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* Intel Physical Address Extension (PAE) Mode - three-level page
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* tables on PPro+ CPUs.
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@@ -150,10 +152,7 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
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{
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pte_t res;
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/* xchg acts as a barrier before the setting of the high bits */
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res.pte_low = xchg(&ptep->pte_low, 0);
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res.pte_high = ptep->pte_high;
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ptep->pte_high = 0;
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res.pte = (pteval_t)arch_atomic64_xchg((atomic64_t *)ptep, 0);
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return res;
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}
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@@ -132,6 +132,8 @@ struct cpuinfo_x86 {
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/* Index into per_cpu list: */
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u16 cpu_index;
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u32 microcode;
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/* Address space bits used by the cache internally */
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u8 x86_cache_bits;
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unsigned initialized : 1;
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} __randomize_layout;
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@@ -183,7 +185,7 @@ extern void cpu_detect(struct cpuinfo_x86 *c);
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static inline unsigned long long l1tf_pfn_limit(void)
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{
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return BIT_ULL(boot_cpu_data.x86_phys_bits - 1 - PAGE_SHIFT);
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return BIT_ULL(boot_cpu_data.x86_cache_bits - 1 - PAGE_SHIFT);
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}
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extern void early_cpu_init(void);
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@@ -39,6 +39,7 @@ extern void do_signal(struct pt_regs *regs);
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#define __ARCH_HAS_SA_RESTORER
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#include <asm/asm.h>
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#include <uapi/asm/sigcontext.h>
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#ifdef __i386__
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@@ -86,9 +87,9 @@ static inline int __const_sigismember(sigset_t *set, int _sig)
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static inline int __gen_sigismember(sigset_t *set, int _sig)
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{
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unsigned char ret;
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asm("btl %2,%1\n\tsetc %0"
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: "=qm"(ret) : "m"(*set), "Ir"(_sig-1) : "cc");
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bool ret;
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asm("btl %2,%1" CC_SET(c)
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: CC_OUT(c) (ret) : "m"(*set), "Ir"(_sig-1));
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return ret;
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}
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@@ -111,6 +111,6 @@ static inline unsigned long caller_frame_pointer(void)
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return (unsigned long)frame;
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}
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void show_opcodes(u8 *rip, const char *loglvl);
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void show_opcodes(struct pt_regs *regs, const char *loglvl);
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void show_ip(struct pt_regs *regs, const char *loglvl);
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#endif /* _ASM_X86_STACKTRACE_H */
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@@ -175,8 +175,16 @@ struct tlb_state {
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* are on. This means that it may not match current->active_mm,
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* which will contain the previous user mm when we're in lazy TLB
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* mode even if we've already switched back to swapper_pg_dir.
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*
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* During switch_mm_irqs_off(), loaded_mm will be set to
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* LOADED_MM_SWITCHING during the brief interrupts-off window
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* when CR3 and loaded_mm would otherwise be inconsistent. This
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* is for nmi_uaccess_okay()'s benefit.
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*/
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struct mm_struct *loaded_mm;
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#define LOADED_MM_SWITCHING ((struct mm_struct *)1)
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u16 loaded_mm_asid;
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u16 next_asid;
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/* last user mm's ctx id */
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@@ -246,6 +254,38 @@ struct tlb_state {
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};
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DECLARE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate);
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/*
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* Blindly accessing user memory from NMI context can be dangerous
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* if we're in the middle of switching the current user task or
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* switching the loaded mm. It can also be dangerous if we
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* interrupted some kernel code that was temporarily using a
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* different mm.
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*/
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static inline bool nmi_uaccess_okay(void)
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{
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struct mm_struct *loaded_mm = this_cpu_read(cpu_tlbstate.loaded_mm);
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struct mm_struct *current_mm = current->mm;
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VM_WARN_ON_ONCE(!loaded_mm);
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/*
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* The condition we want to check is
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* current_mm->pgd == __va(read_cr3_pa()). This may be slow, though,
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* if we're running in a VM with shadow paging, and nmi_uaccess_okay()
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* is supposed to be reasonably fast.
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*
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* Instead, we check the almost equivalent but somewhat conservative
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* condition below, and we rely on the fact that switch_mm_irqs_off()
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* sets loaded_mm to LOADED_MM_SWITCHING before writing to CR3.
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*/
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if (loaded_mm != current_mm)
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return false;
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VM_WARN_ON_ONCE(current_mm->pgd != __va(read_cr3_pa()));
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return true;
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}
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/* Initialize cr4 shadow for this CPU. */
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static inline void cr4_init_shadow(void)
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{
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@@ -93,7 +93,7 @@ static inline unsigned int __getcpu(void)
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*
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* If RDPID is available, use it.
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*/
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alternative_io ("lsl %[p],%[seg]",
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alternative_io ("lsl %[seg],%[p]",
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".byte 0xf3,0x0f,0xc7,0xf8", /* RDPID %eax/rax */
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X86_FEATURE_RDPID,
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[p] "=a" (p), [seg] "r" (__PER_CPU_SEG));
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