PCI: cadence: Remove private bus number and range storage
There's no need to store the bus number or range resource as the driver only needs the bus number which is already in the pci_host_bridge. For endpoint mode, the bus number is always 0. Link: https://lore.kernel.org/r/20200722022514.1283916-14-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Tom Joseph <tjoseph@cadence.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com>
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committed by
Lorenzo Pieralisi

parent
06ff98fcc4
commit
ec64e27959
@@ -235,7 +235,6 @@ struct cdns_pcie {
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struct resource *mem_res;
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struct device *dev;
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bool is_rc;
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u8 bus;
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int phy_count;
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struct phy **phy;
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struct device_link **link;
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@@ -248,7 +247,6 @@ struct cdns_pcie {
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* @dev: pointer to PCIe device
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* @cfg_res: start/end offsets in the physical system memory to map PCI
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* configuration space accesses
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* @bus_range: first/last buses behind the PCIe host controller
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* @cfg_base: IO mapped window to access the PCI configuration space of a
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* single function at a time
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* @no_bar_nbits: Number of bits to keep for inbound (PCIe -> CPU) address
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@@ -259,7 +257,6 @@ struct cdns_pcie {
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struct cdns_pcie_rc {
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struct cdns_pcie pcie;
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struct resource *cfg_res;
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struct resource *bus_range;
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void __iomem *cfg_base;
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u32 no_bar_nbits;
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u32 vendor_id;
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@@ -381,11 +378,12 @@ static inline int cdns_pcie_ep_setup(struct cdns_pcie_ep *ep)
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return 0;
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}
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#endif
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void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 fn,
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void cdns_pcie_set_outbound_region(struct cdns_pcie *pcie, u8 busnr, u8 fn,
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u32 r, bool is_io,
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u64 cpu_addr, u64 pci_addr, size_t size);
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void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, u8 fn,
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void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie,
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u8 busnr, u8 fn,
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u32 r, u64 cpu_addr);
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void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r);
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