Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul: "This pull brings: - Andy's DW driver updates - Guennadi's sh driver updates - Pl08x driver fixes from Tomasz & Alban - Improvements to mmp_pdma by Daniel - TI EDMA fixes by Joel - New drivers: - Hisilicon k3dma driver - Renesas rcar dma driver - New API for publishing slave driver capablities - Various fixes across the subsystem by Andy, Jingoo, Sachin etc..." * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (94 commits) dma: edma: Remove limits on number of slots dma: edma: Leave linked to Null slot instead of DUMMY slot dma: edma: Find missed events and issue them ARM: edma: Add function to manually trigger an EDMA channel dma: edma: Write out and handle MAX_NR_SG at a given time dma: edma: Setup parameters to DMA MAX_NR_SG at a time dmaengine: pl330: use dma_set_max_seg_size to set the sg limit dmaengine: dma_slave_caps: remove sg entries dma: replace devm_request_and_ioremap by devm_ioremap_resource dma: ste_dma40: Fix potential null pointer dereference dma: ste_dma40: Remove duplicate const dma: imx-dma: Remove redundant NULL check dma: dmagengine: fix function names in comments dma: add driver for R-Car HPB-DMAC dma: k3dma: use devm_ioremap_resource() instead of devm_request_and_ioremap() dma: imx-sdma: Staticize sdma_driver_data structures pch_dma: Add MODULE_DEVICE_TABLE dmaengine: PL08x: Add cyclic transfer support dmaengine: PL08x: Fix reading the byte count in cctl dmaengine: PL08x: Add support for different maximum transfer size ...
This commit is contained in:
@@ -1,7 +1,12 @@
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* Freescale Smart Direct Memory Access (SDMA) Controller for i.MX
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Required properties:
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- compatible : Should be "fsl,<chip>-sdma"
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- compatible : Should be "fsl,imx31-sdma", "fsl,imx31-to1-sdma",
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"fsl,imx31-to2-sdma", "fsl,imx35-sdma", "fsl,imx35-to1-sdma",
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"fsl,imx35-to2-sdma", "fsl,imx51-sdma", "fsl,imx53-sdma" or
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"fsl,imx6q-sdma". The -to variants should be preferred since they
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allow to determnine the correct ROM script addresses needed for
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the driver to work without additional firmware.
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- reg : Should contain SDMA registers location and length
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- interrupts : Should contain SDMA interrupt
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- #dma-cells : Must be <3>.
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46
Documentation/devicetree/bindings/dma/k3dma.txt
Normal file
46
Documentation/devicetree/bindings/dma/k3dma.txt
Normal file
@@ -0,0 +1,46 @@
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* Hisilicon K3 DMA controller
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See dma.txt first
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Required properties:
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- compatible: Should be "hisilicon,k3-dma-1.0"
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- reg: Should contain DMA registers location and length.
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- interrupts: Should contain one interrupt shared by all channel
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- #dma-cells: see dma.txt, should be 1, para number
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- dma-channels: physical channels supported
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- dma-requests: virtual channels supported, each virtual channel
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have specific request line
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- clocks: clock required
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Example:
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Controller:
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dma0: dma@fcd02000 {
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compatible = "hisilicon,k3-dma-1.0";
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reg = <0xfcd02000 0x1000>;
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#dma-cells = <1>;
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dma-channels = <16>;
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dma-requests = <27>;
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interrupts = <0 12 4>;
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clocks = <&pclk>;
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status = "disable";
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};
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Client:
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Use specific request line passing from dmax
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For example, i2c0 read channel request line is 18, while write channel use 19
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i2c0: i2c@fcb08000 {
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compatible = "snps,designware-i2c";
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dmas = <&dma0 18 /* read channel */
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&dma0 19>; /* write channel */
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dma-names = "rx", "tx";
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};
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i2c1: i2c@fcb09000 {
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compatible = "snps,designware-i2c";
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dmas = <&dma0 20 /* read channel */
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&dma0 21>; /* write channel */
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dma-names = "rx", "tx";
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};
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@@ -22,42 +22,51 @@ Optional properties (currently unused):
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* DMA controller
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Required properties:
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- compatible: should be "renesas,shdma"
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- compatible: should be of the form "renesas,shdma-<soc>", where <soc> should
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be replaced with the desired SoC model, e.g.
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"renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
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Example:
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dmac: dma-mux0 {
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dmac: dma-multiplexer@0 {
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compatible = "renesas,shdma-mux";
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#dma-cells = <1>;
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dma-channels = <6>;
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dma-channels = <20>;
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dma-requests = <256>;
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reg = <0 0>; /* Needed for AUXDATA */
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#address-cells = <1>;
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#size-cells = <1>;
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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dma0: shdma@fe008020 {
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compatible = "renesas,shdma";
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reg = <0xfe008020 0x270>,
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<0xfe009000 0xc>;
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dma0: dma-controller@e6700020 {
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compatible = "renesas,shdma-r8a73a4";
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reg = <0 0xe6700020 0 0x89e0>;
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interrupt-parent = <&gic>;
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interrupts = <0 34 4
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0 28 4
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0 29 4
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0 30 4
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0 31 4
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0 32 4
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0 33 4>;
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interrupts = <0 220 4
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0 200 4
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0 201 4
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0 202 4
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0 203 4
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0 204 4
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0 205 4
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0 206 4
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0 207 4
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0 208 4
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0 209 4
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0 210 4
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0 211 4
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0 212 4
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0 213 4
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0 214 4
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0 215 4
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0 216 4
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0 217 4
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0 218 4
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0 219 4>;
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interrupt-names = "error",
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"ch0", "ch1", "ch2", "ch3",
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"ch4", "ch5";
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};
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dma1: shdma@fe018020 {
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...
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};
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dma2: shdma@fe028020 {
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...
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"ch4", "ch5", "ch6", "ch7",
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"ch8", "ch9", "ch10", "ch11",
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"ch12", "ch13", "ch14", "ch15",
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"ch16", "ch17", "ch18", "ch19";
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};
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};
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