xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

clk: samsung: exynos5420: Move sleep init function and PLL data to init section

Browse Source 
The exynos5420_clk_sleep_init() function and arrays with initialization
data of PLLs can be moved to init section because they are referenced
only from other init-level symbols.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Krzysztof Kozlowski
2016-05-11 14:02:12 +02:00
committed by Sylwester Nawrocki
parent 402b7cebf2
commit ebd217e165
1 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/clk/samsung/clk-exynos5420.c
View File

@@ -306,7 +306,7 @@ static struct syscore_ops exynos5420_clk_syscore_ops = {
.resume = exynos5420_clk_resume, .resume = exynos5420_clk_resume,
}; };
static void exynos5420_clk_sleep_init(void) static void __init exynos5420_clk_sleep_init(void)
{ {
exynos5x_save = samsung_clk_alloc_reg_dump(exynos5x_clk_regs, exynos5x_save = samsung_clk_alloc_reg_dump(exynos5x_clk_regs,
ARRAY_SIZE(exynos5x_clk_regs)); ARRAY_SIZE(exynos5x_clk_regs));
@@ -333,7 +333,7 @@ err_soc:
return; return;
} }
#else #else
static void exynos5420_clk_sleep_init(void) {} static void __init exynos5420_clk_sleep_init(void) {}
#endif #endif
/* list of all parent clocks */ /* list of all parent clocks */
@@ -1219,7 +1219,7 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = {
GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0), GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0),
}; };
static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] = { static const struct samsung_pll_rate_table exynos5420_pll2550x_24mhz_tbl[] __initconst = {
PLL_35XX_RATE(2000000000, 250, 3, 0), PLL_35XX_RATE(2000000000, 250, 3, 0),
PLL_35XX_RATE(1900000000, 475, 6, 0), PLL_35XX_RATE(1900000000, 475, 6, 0),
PLL_35XX_RATE(1800000000, 225, 3, 0), PLL_35XX_RATE(1800000000, 225, 3, 0),