ARM: trusted_foundations: Support L2 cache maintenance

Implement L2 cache initialization firmware callback that should be
invoked early during boot in order to set up the required outer cache
driver's callbacks and add the callback required for L2X0 maintenance.

Partially based on work done by Michał Mirosław [1].

[1] https://www.spinics.net/lists/arm-kernel/msg594765.html

Tested-by: Robert Yang <decatf@gmail.com>
Tested-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko
2019-03-18 01:52:04 +03:00
committed by Thierry Reding
parent 9e98c678c2
commit ebca2a6ee1
2 changed files with 51 additions and 0 deletions

View File

@@ -32,6 +32,9 @@
#include <linux/cpu.h>
#include <linux/smp.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/outercache.h>
struct trusted_foundations_platform_data {
unsigned int version_major;
unsigned int version_minor;
@@ -43,6 +46,9 @@ void register_trusted_foundations(struct trusted_foundations_platform_data *pd);
void of_register_trusted_foundations(void);
#else /* CONFIG_TRUSTED_FOUNDATIONS */
static inline void tf_dummy_write_sec(unsigned long val, unsigned int reg)
{
}
static inline void register_trusted_foundations(
struct trusted_foundations_platform_data *pd)
@@ -53,6 +59,10 @@ static inline void register_trusted_foundations(
*/
pr_err("No support for Trusted Foundations, continuing in degraded mode.\n");
pr_err("Secondary processors as well as CPU PM will be disabled.\n");
#if IS_ENABLED(CONFIG_CACHE_L2X0)
pr_err("L2X0 cache will be kept disabled.\n");
outer_cache.write_sec = tf_dummy_write_sec;
#endif
#if IS_ENABLED(CONFIG_SMP)
setup_max_cpus = 0;
#endif