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drm/amd/display: get rid of 32.32 unsigned fixed point

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32.32 is redundant, 31.32 does everything we use 32.32 for

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin
2018-04-18 11:37:53 -04:00
committed by Alex Deucher
parent b79655c37b
commit eb0e515464
32 changed files with 661 additions and 947 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/display/dc/basics/Makefile
View File

@@ -24,7 +24,7 @@
# It provides the general basic services required by other DAL
# subcomponents.
BASICS = conversion.o fixpt31_32.o fixpt32_32.o \
BASICS = conversion.o fixpt31_32.o \
logger.o log_helpers.o vector.o
AMD_DAL_BASICS = $(addprefix $(AMDDALPATH)/dc/basics/,$(BASICS))

28
drivers/gpu/drm/amd/display/dc/basics/conversion.c
View File

@@ -41,22 +41,22 @@ uint16_t fixed_point_to_int_frac(
uint16_t result;
uint16_t d = (uint16_t)dal_fixed31_32_floor(
dal_fixed31_32_abs(
uint16_t d = (uint16_t)dc_fixpt_floor(
dc_fixpt_abs(
arg));
if (d <= (uint16_t)(1 << integer_bits) - (1 / (uint16_t)divisor))
numerator = (uint16_t)dal_fixed31_32_round(
dal_fixed31_32_mul_int(
numerator = (uint16_t)dc_fixpt_round(
dc_fixpt_mul_int(
arg,
divisor));
else {
numerator = dal_fixed31_32_floor(
dal_fixed31_32_sub(
dal_fixed31_32_from_int(
numerator = dc_fixpt_floor(
dc_fixpt_sub(
dc_fixpt_from_int(
1LL << integer_bits),
dal_fixed31_32_recip(
dal_fixed31_32_from_int(
dc_fixpt_recip(
dc_fixpt_from_int(
divisor))));
}
@@ -66,8 +66,8 @@ uint16_t fixed_point_to_int_frac(
result = (uint16_t)(
(1 << (integer_bits + fractional_bits + 1)) + numerator);
if ((result != 0) && dal_fixed31_32_lt(
arg, dal_fixed31_32_zero))
if ((result != 0) && dc_fixpt_lt(
arg, dc_fixpt_zero))
result |= 1 << (integer_bits + fractional_bits);
return result;
@@ -84,15 +84,15 @@ void convert_float_matrix(
uint32_t buffer_size)
{
const struct fixed31_32 min_2_13 =
dal_fixed31_32_from_fraction(S2D13_MIN, DIVIDER);
dc_fixpt_from_fraction(S2D13_MIN, DIVIDER);
const struct fixed31_32 max_2_13 =
dal_fixed31_32_from_fraction(S2D13_MAX, DIVIDER);
dc_fixpt_from_fraction(S2D13_MAX, DIVIDER);
uint32_t i;
for (i = 0; i < buffer_size; ++i) {
uint32_t reg_value =
fixed_point_to_int_frac(
dal_fixed31_32_clamp(
dc_fixpt_clamp(
flt[i],
min_2_13,
max_2_13),

176
drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
View File

@@ -64,7 +64,7 @@ static inline unsigned long long complete_integer_division_u64(
#define GET_FRACTIONAL_PART(x) \
(FRACTIONAL_PART_MASK & (x))
struct fixed31_32 dal_fixed31_32_from_fraction(
struct fixed31_32 dc_fixpt_from_fraction(
long long numerator,
long long denominator)
{
@@ -118,7 +118,7 @@ struct fixed31_32 dal_fixed31_32_from_fraction(
return res;
}
struct fixed31_32 dal_fixed31_32_from_int_nonconst(
struct fixed31_32 dc_fixpt_from_int_nonconst(
long long arg)
{
struct fixed31_32 res;
@@ -130,7 +130,7 @@ struct fixed31_32 dal_fixed31_32_from_int_nonconst(
return res;
}
struct fixed31_32 dal_fixed31_32_shl(
struct fixed31_32 dc_fixpt_shl(
struct fixed31_32 arg,
unsigned char shift)
{
@@ -144,7 +144,7 @@ struct fixed31_32 dal_fixed31_32_shl(
return res;
}
struct fixed31_32 dal_fixed31_32_add(
struct fixed31_32 dc_fixpt_add(
struct fixed31_32 arg1,
struct fixed31_32 arg2)
{
@@ -158,7 +158,7 @@ struct fixed31_32 dal_fixed31_32_add(
return res;
}
struct fixed31_32 dal_fixed31_32_sub(
struct fixed31_32 dc_fixpt_sub(
struct fixed31_32 arg1,
struct fixed31_32 arg2)
{
@@ -172,7 +172,7 @@ struct fixed31_32 dal_fixed31_32_sub(
return res;
}
struct fixed31_32 dal_fixed31_32_mul(
struct fixed31_32 dc_fixpt_mul(
struct fixed31_32 arg1,
struct fixed31_32 arg2)
{
@@ -213,7 +213,7 @@ struct fixed31_32 dal_fixed31_32_mul(
tmp = arg1_fra * arg2_fra;
tmp = (tmp >> FIXED31_32_BITS_PER_FRACTIONAL_PART) +
(tmp >= (unsigned long long)dal_fixed31_32_half.value);
(tmp >= (unsigned long long)dc_fixpt_half.value);
ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));
@@ -225,7 +225,7 @@ struct fixed31_32 dal_fixed31_32_mul(
return res;
}
struct fixed31_32 dal_fixed31_32_sqr(
struct fixed31_32 dc_fixpt_sqr(
struct fixed31_32 arg)
{
struct fixed31_32 res;
@@ -257,7 +257,7 @@ struct fixed31_32 dal_fixed31_32_sqr(
tmp = arg_fra * arg_fra;
tmp = (tmp >> FIXED31_32_BITS_PER_FRACTIONAL_PART) +
(tmp >= (unsigned long long)dal_fixed31_32_half.value);
(tmp >= (unsigned long long)dc_fixpt_half.value);
ASSERT(tmp <= (unsigned long long)(LLONG_MAX - res.value));
@@ -266,7 +266,7 @@ struct fixed31_32 dal_fixed31_32_sqr(
return res;
}
struct fixed31_32 dal_fixed31_32_recip(
struct fixed31_32 dc_fixpt_recip(
struct fixed31_32 arg)
{
/*
@@ -276,41 +276,41 @@ struct fixed31_32 dal_fixed31_32_recip(
ASSERT(arg.value);
return dal_fixed31_32_from_fraction(
dal_fixed31_32_one.value,
return dc_fixpt_from_fraction(
dc_fixpt_one.value,
arg.value);
}
struct fixed31_32 dal_fixed31_32_sinc(
struct fixed31_32 dc_fixpt_sinc(
struct fixed31_32 arg)
{
struct fixed31_32 square;
struct fixed31_32 res = dal_fixed31_32_one;
struct fixed31_32 res = dc_fixpt_one;
int n = 27;
struct fixed31_32 arg_norm = arg;
if (dal_fixed31_32_le(
dal_fixed31_32_two_pi,
dal_fixed31_32_abs(arg))) {
arg_norm = dal_fixed31_32_sub(
if (dc_fixpt_le(
dc_fixpt_two_pi,
dc_fixpt_abs(arg))) {
arg_norm = dc_fixpt_sub(
arg_norm,
dal_fixed31_32_mul_int(
dal_fixed31_32_two_pi,
dc_fixpt_mul_int(
dc_fixpt_two_pi,
(int)div64_s64(
arg_norm.value,
dal_fixed31_32_two_pi.value)));
dc_fixpt_two_pi.value)));
}
square = dal_fixed31_32_sqr(arg_norm);
square = dc_fixpt_sqr(arg_norm);
do {
res = dal_fixed31_32_sub(
dal_fixed31_32_one,
dal_fixed31_32_div_int(
dal_fixed31_32_mul(
res = dc_fixpt_sub(
dc_fixpt_one,
dc_fixpt_div_int(
dc_fixpt_mul(
square,
res),
n * (n - 1)));
@@ -319,37 +319,37 @@ struct fixed31_32 dal_fixed31_32_sinc(
} while (n > 2);
if (arg.value != arg_norm.value)
res = dal_fixed31_32_div(
dal_fixed31_32_mul(res, arg_norm),
res = dc_fixpt_div(
dc_fixpt_mul(res, arg_norm),
arg);
return res;
}
struct fixed31_32 dal_fixed31_32_sin(
struct fixed31_32 dc_fixpt_sin(
struct fixed31_32 arg)
{
return dal_fixed31_32_mul(
return dc_fixpt_mul(
arg,
dal_fixed31_32_sinc(arg));
dc_fixpt_sinc(arg));
}
struct fixed31_32 dal_fixed31_32_cos(
struct fixed31_32 dc_fixpt_cos(
struct fixed31_32 arg)
{
/* TODO implement argument normalization */
const struct fixed31_32 square = dal_fixed31_32_sqr(arg);
const struct fixed31_32 square = dc_fixpt_sqr(arg);
struct fixed31_32 res = dal_fixed31_32_one;
struct fixed31_32 res = dc_fixpt_one;
int n = 26;
do {
res = dal_fixed31_32_sub(
dal_fixed31_32_one,
dal_fixed31_32_div_int(
dal_fixed31_32_mul(
res = dc_fixpt_sub(
dc_fixpt_one,
dc_fixpt_div_int(
dc_fixpt_mul(
square,
res),
n * (n - 1)));
@@ -372,31 +372,31 @@ static struct fixed31_32 fixed31_32_exp_from_taylor_series(
{
unsigned int n = 9;
struct fixed31_32 res = dal_fixed31_32_from_fraction(
struct fixed31_32 res = dc_fixpt_from_fraction(
n + 2,
n + 1);
/* TODO find correct res */
ASSERT(dal_fixed31_32_lt(arg, dal_fixed31_32_one));
ASSERT(dc_fixpt_lt(arg, dc_fixpt_one));
do
res = dal_fixed31_32_add(
dal_fixed31_32_one,
dal_fixed31_32_div_int(
dal_fixed31_32_mul(
res = dc_fixpt_add(
dc_fixpt_one,
dc_fixpt_div_int(
dc_fixpt_mul(
arg,
res),
n));
while (--n != 1);
return dal_fixed31_32_add(
dal_fixed31_32_one,
dal_fixed31_32_mul(
return dc_fixpt_add(
dc_fixpt_one,
dc_fixpt_mul(
arg,
res));
}
struct fixed31_32 dal_fixed31_32_exp(
struct fixed31_32 dc_fixpt_exp(
struct fixed31_32 arg)
{
/*
@@ -406,44 +406,44 @@ struct fixed31_32 dal_fixed31_32_exp(
* where m = round(x / ln(2)), r = x - m * ln(2)
*/
if (dal_fixed31_32_le(
dal_fixed31_32_ln2_div_2,
dal_fixed31_32_abs(arg))) {
int m = dal_fixed31_32_round(
dal_fixed31_32_div(
if (dc_fixpt_le(
dc_fixpt_ln2_div_2,
dc_fixpt_abs(arg))) {
int m = dc_fixpt_round(
dc_fixpt_div(
arg,
dal_fixed31_32_ln2));
dc_fixpt_ln2));
struct fixed31_32 r = dal_fixed31_32_sub(
struct fixed31_32 r = dc_fixpt_sub(
arg,
dal_fixed31_32_mul_int(
dal_fixed31_32_ln2,
dc_fixpt_mul_int(
dc_fixpt_ln2,
m));
ASSERT(m != 0);
ASSERT(dal_fixed31_32_lt(
dal_fixed31_32_abs(r),
dal_fixed31_32_one));
ASSERT(dc_fixpt_lt(
dc_fixpt_abs(r),
dc_fixpt_one));
if (m > 0)
return dal_fixed31_32_shl(
return dc_fixpt_shl(
fixed31_32_exp_from_taylor_series(r),
(unsigned char)m);
else
return dal_fixed31_32_div_int(
return dc_fixpt_div_int(
fixed31_32_exp_from_taylor_series(r),
1LL << -m);
} else if (arg.value != 0)
return fixed31_32_exp_from_taylor_series(arg);
else
return dal_fixed31_32_one;
return dc_fixpt_one;
}
struct fixed31_32 dal_fixed31_32_log(
struct fixed31_32 dc_fixpt_log(
struct fixed31_32 arg)
{
struct fixed31_32 res = dal_fixed31_32_neg(dal_fixed31_32_one);
struct fixed31_32 res = dc_fixpt_neg(dc_fixpt_one);
/* TODO improve 1st estimation */
struct fixed31_32 error;
@@ -453,15 +453,15 @@ struct fixed31_32 dal_fixed31_32_log(
/* TODO if arg is zero, return -INF */
do {
struct fixed31_32 res1 = dal_fixed31_32_add(
dal_fixed31_32_sub(
struct fixed31_32 res1 = dc_fixpt_add(
dc_fixpt_sub(
res,
dal_fixed31_32_one),
dal_fixed31_32_div(
dc_fixpt_one),
dc_fixpt_div(
arg,
dal_fixed31_32_exp(res)));
dc_fixpt_exp(res)));
error = dal_fixed31_32_sub(
error = dc_fixpt_sub(
res,
res1);
@@ -472,17 +472,17 @@ struct fixed31_32 dal_fixed31_32_log(
return res;
}
struct fixed31_32 dal_fixed31_32_pow(
struct fixed31_32 dc_fixpt_pow(
struct fixed31_32 arg1,
struct fixed31_32 arg2)
{
return dal_fixed31_32_exp(
dal_fixed31_32_mul(
dal_fixed31_32_log(arg1),
return dc_fixpt_exp(
dc_fixpt_mul(
dc_fixpt_log(arg1),
arg2));
}
int dal_fixed31_32_floor(
int dc_fixpt_floor(
struct fixed31_32 arg)
{
unsigned long long arg_value = abs_i64(arg.value);
@@ -493,12 +493,12 @@ int dal_fixed31_32_floor(
return -(int)GET_INTEGER_PART(arg_value);
}
int dal_fixed31_32_round(
int dc_fixpt_round(
struct fixed31_32 arg)
{
unsigned long long arg_value = abs_i64(arg.value);
const long long summand = dal_fixed31_32_half.value;
const long long summand = dc_fixpt_half.value;
ASSERT(LLONG_MAX - (long long)arg_value >= summand);
@@ -510,13 +510,13 @@ int dal_fixed31_32_round(
return -(int)GET_INTEGER_PART(arg_value);
}
int dal_fixed31_32_ceil(
int dc_fixpt_ceil(
struct fixed31_32 arg)
{
unsigned long long arg_value = abs_i64(arg.value);
const long long summand = dal_fixed31_32_one.value -
dal_fixed31_32_epsilon.value;
const long long summand = dc_fixpt_one.value -
dc_fixpt_epsilon.value;
ASSERT(LLONG_MAX - (long long)arg_value >= summand);
@@ -531,7 +531,7 @@ int dal_fixed31_32_ceil(
/* this function is a generic helper to translate fixed point value to
* specified integer format that will consist of integer_bits integer part and
* fractional_bits fractional part. For example it is used in
* dal_fixed31_32_u2d19 to receive 2 bits integer part and 19 bits fractional
* dc_fixpt_u2d19 to receive 2 bits integer part and 19 bits fractional
* part in 32 bits. It is used in hw programming (scaler)
*/
@@ -570,35 +570,35 @@ static inline unsigned int clamp_ux_dy(
return min_clamp;
}
unsigned int dal_fixed31_32_u2d19(
unsigned int dc_fixpt_u2d19(
struct fixed31_32 arg)
{
return ux_dy(arg.value, 2, 19);
}
unsigned int dal_fixed31_32_u0d19(
unsigned int dc_fixpt_u0d19(
struct fixed31_32 arg)
{
return ux_dy(arg.value, 0, 19);
}
unsigned int dal_fixed31_32_clamp_u0d14(
unsigned int dc_fixpt_clamp_u0d14(
struct fixed31_32 arg)
{
return clamp_ux_dy(arg.value, 0, 14, 1);
}
unsigned int dal_fixed31_32_clamp_u0d10(
unsigned int dc_fixpt_clamp_u0d10(
struct fixed31_32 arg)
{
return clamp_ux_dy(arg.value, 0, 10, 1);
}
int dal_fixed31_32_s4d19(
int dc_fixpt_s4d19(
struct fixed31_32 arg)
{
if (arg.value < 0)
return -(int)ux_dy(dal_fixed31_32_abs(arg).value, 4, 19);
return -(int)ux_dy(dc_fixpt_abs(arg).value, 4, 19);
else
return ux_dy(arg.value, 4, 19);
}

161
drivers/gpu/drm/amd/display/dc/basics/fixpt32_32.c
View File

@@ -1,161 +0,0 @@
/*
* Copyright 2012-15 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors: AMD
*
*/
#include "dm_services.h"
#include "include/fixed32_32.h"
static uint64_t u64_div(uint64_t n, uint64_t d)
{
uint32_t i = 0;
uint64_t r;
uint64_t q = div64_u64_rem(n, d, &r);
for (i = 0; i < 32; ++i) {
uint64_t sbit = q & (1ULL<<63);
r <<= 1;
r |= sbit ? 1 : 0;
q <<= 1;
if (r >= d) {
r -= d;
q |= 1;
}
}
if (2*r >= d)
q += 1;
return q;
}
struct fixed32_32 dal_fixed32_32_from_fraction(uint32_t n, uint32_t d)
{
struct fixed32_32 fx;
fx.value = u64_div((uint64_t)n << 32, (uint64_t)d << 32);
return fx;
}
struct fixed32_32 dal_fixed32_32_add(
struct fixed32_32 lhs,
struct fixed32_32 rhs)
{
struct fixed32_32 fx = {lhs.value + rhs.value};
ASSERT(fx.value >= rhs.value);
return fx;
}
struct fixed32_32 dal_fixed32_32_add_int(struct fixed32_32 lhs, uint32_t rhs)
{
struct fixed32_32 fx = {lhs.value + ((uint64_t)rhs << 32)};
ASSERT(fx.value >= (uint64_t)rhs << 32);
return fx;
}
struct fixed32_32 dal_fixed32_32_sub(
struct fixed32_32 lhs,
struct fixed32_32 rhs)
{
struct fixed32_32 fx;
ASSERT(lhs.value >= rhs.value);
fx.value = lhs.value - rhs.value;
return fx;
}
struct fixed32_32 dal_fixed32_32_sub_int(struct fixed32_32 lhs, uint32_t rhs)
{
struct fixed32_32 fx;
ASSERT(lhs.value >= ((uint64_t)rhs<<32));
fx.value = lhs.value - ((uint64_t)rhs<<32);
return fx;
}
struct fixed32_32 dal_fixed32_32_mul(
struct fixed32_32 lhs,
struct fixed32_32 rhs)
{
struct fixed32_32 fx;
uint64_t lhs_int = lhs.value>>32;
uint64_t lhs_frac = (uint32_t)lhs.value;
uint64_t rhs_int = rhs.value>>32;
uint64_t rhs_frac = (uint32_t)rhs.value;
uint64_t ahbh = lhs_int * rhs_int;
uint64_t ahbl = lhs_int * rhs_frac;
uint64_t albh = lhs_frac * rhs_int;
uint64_t albl = lhs_frac * rhs_frac;
ASSERT((ahbh>>32) == 0);
fx.value = (ahbh<<32) + ahbl + albh + (albl>>32);
return fx;
}
struct fixed32_32 dal_fixed32_32_mul_int(struct fixed32_32 lhs, uint32_t rhs)
{
struct fixed32_32 fx;
uint64_t lhsi = (lhs.value>>32) * (uint64_t)rhs;
uint64_t lhsf;
ASSERT((lhsi>>32) == 0);
lhsf = ((uint32_t)lhs.value) * (uint64_t)rhs;
ASSERT((lhsi<<32) + lhsf >= lhsf);
fx.value = (lhsi<<32) + lhsf;
return fx;
}
struct fixed32_32 dal_fixed32_32_div(
struct fixed32_32 lhs,
struct fixed32_32 rhs)
{
struct fixed32_32 fx;
fx.value = u64_div(lhs.value, rhs.value);
return fx;
}
struct fixed32_32 dal_fixed32_32_div_int(struct fixed32_32 lhs, uint32_t rhs)
{
struct fixed32_32 fx;
fx.value = u64_div(lhs.value, (uint64_t)rhs << 32);
return fx;
}
uint32_t dal_fixed32_32_ceil(struct fixed32_32 v)
{
ASSERT((uint32_t)v.value ? (v.value >> 32) + 1 >= 1 : true);
return (v.value>>32) + ((uint32_t)v.value ? 1 : 0);
}
uint32_t dal_fixed32_32_round(struct fixed32_32 v)
{
ASSERT(v.value + (1ULL<<31) >= (1ULL<<31));
return (v.value + (1ULL<<31))>>32;
}

46
drivers/gpu/drm/amd/display/dc/calcs/custom_float.c
View File

@@ -36,41 +36,41 @@ static bool build_custom_float(
uint32_t exp_offset = (1 << (format->exponenta_bits - 1)) - 1;
const struct fixed31_32 mantissa_constant_plus_max_fraction =
dal_fixed31_32_from_fraction(
dc_fixpt_from_fraction(
(1LL << (format->mantissa_bits + 1)) - 1,
1LL << format->mantissa_bits);
struct fixed31_32 mantiss;
if (dal_fixed31_32_eq(
if (dc_fixpt_eq(
value,
dal_fixed31_32_zero)) {
dc_fixpt_zero)) {
*negative = false;
*mantissa = 0;
*exponenta = 0;
return true;
}
if (dal_fixed31_32_lt(
if (dc_fixpt_lt(
value,
dal_fixed31_32_zero)) {
dc_fixpt_zero)) {
*negative = format->sign;
value = dal_fixed31_32_neg(value);
value = dc_fixpt_neg(value);
} else {
*negative = false;
}
if (dal_fixed31_32_lt(
if (dc_fixpt_lt(
value,
dal_fixed31_32_one)) {
dc_fixpt_one)) {
uint32_t i = 1;
do {
value = dal_fixed31_32_shl(value, 1);
value = dc_fixpt_shl(value, 1);
++i;
} while (dal_fixed31_32_lt(
} while (dc_fixpt_lt(
value,
dal_fixed31_32_one));
dc_fixpt_one));
--i;
@@ -81,15 +81,15 @@ static bool build_custom_float(
}
*exponenta = exp_offset - i;
} else if (dal_fixed31_32_le(
} else if (dc_fixpt_le(
mantissa_constant_plus_max_fraction,
value)) {
uint32_t i = 1;
do {
value = dal_fixed31_32_shr(value, 1);
value = dc_fixpt_shr(value, 1);
++i;
} while (dal_fixed31_32_lt(
} while (dc_fixpt_lt(
mantissa_constant_plus_max_fraction,
value));
@@ -98,23 +98,23 @@ static bool build_custom_float(
*exponenta = exp_offset;
}
mantiss = dal_fixed31_32_sub(
mantiss = dc_fixpt_sub(
value,
dal_fixed31_32_one);
dc_fixpt_one);
if (dal_fixed31_32_lt(
if (dc_fixpt_lt(
mantiss,
dal_fixed31_32_zero) ||
dal_fixed31_32_lt(
dal_fixed31_32_one,
dc_fixpt_zero) ||
dc_fixpt_lt(
dc_fixpt_one,
mantiss))
mantiss = dal_fixed31_32_zero;
mantiss = dc_fixpt_zero;
else
mantiss = dal_fixed31_32_shl(
mantiss = dc_fixpt_shl(
mantiss,
format->mantissa_bits);
*mantissa = dal_fixed31_32_floor(mantiss);
*mantissa = dc_fixpt_floor(mantiss);
return true;
}

8
drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
View File

@@ -873,14 +873,14 @@ bool dcn_validate_bandwidth(
}
if (pipe->plane_state->rotation % 2 == 0) {
ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dal_fixed31_32_one.value
ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
|| v->scaler_rec_out_width[input_idx] == v->viewport_width[input_idx]);
ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dal_fixed31_32_one.value
ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value
|| v->scaler_recout_height[input_idx] == v->viewport_height[input_idx]);
} else {
ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dal_fixed31_32_one.value
ASSERT(pipe->plane_res.scl_data.ratios.horz.value != dc_fixpt_one.value
|| v->scaler_recout_height[input_idx] == v->viewport_width[input_idx]);
ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dal_fixed31_32_one.value
ASSERT(pipe->plane_res.scl_data.ratios.vert.value != dc_fixpt_one.value
|| v->scaler_rec_out_width[input_idx] == v->viewport_height[input_idx]);
}
v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no;

12
drivers/gpu/drm/amd/display/dc/core/dc_link.c
View File

@@ -631,7 +631,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
/* Need to setup mst link_cap struct here
* otherwise dc_link_detect() will leave mst link_cap
* empty which leads to allocate_mst_payload() has "0"
* pbn_per_slot value leading to exception on dal_fixed31_32_div()
* pbn_per_slot value leading to exception on dc_fixpt_div()
*/
link->verified_link_cap = link->reported_link_cap;
return false;
@@ -2059,10 +2059,10 @@ static struct fixed31_32 get_pbn_per_slot(struct dc_stream_state *stream)
&stream->sink->link->cur_link_settings;
uint32_t link_rate_in_mbps =
link_settings->link_rate * LINK_RATE_REF_FREQ_IN_MHZ;
struct fixed31_32 mbps = dal_fixed31_32_from_int(
struct fixed31_32 mbps = dc_fixpt_from_int(
link_rate_in_mbps * link_settings->lane_count);
return dal_fixed31_32_div_int(mbps, 54);
return dc_fixpt_div_int(mbps, 54);
}
static int get_color_depth(enum dc_color_depth color_depth)
@@ -2103,7 +2103,7 @@ static struct fixed31_32 get_pbn_from_timing(struct pipe_ctx *pipe_ctx)
numerator = 64 * PEAK_FACTOR_X1000;
denominator = 54 * 8 * 1000 * 1000;
kbps *= numerator;
peak_kbps = dal_fixed31_32_from_fraction(kbps, denominator);
peak_kbps = dc_fixpt_from_fraction(kbps, denominator);
return peak_kbps;
}
@@ -2230,7 +2230,7 @@ static enum dc_status allocate_mst_payload(struct pipe_ctx *pipe_ctx)
/* slot X.Y for only current stream */
pbn_per_slot = get_pbn_per_slot(stream);
pbn = get_pbn_from_timing(pipe_ctx);
avg_time_slots_per_mtp = dal_fixed31_32_div(pbn, pbn_per_slot);
avg_time_slots_per_mtp = dc_fixpt_div(pbn, pbn_per_slot);
stream_encoder->funcs->set_mst_bandwidth(
stream_encoder,
@@ -2247,7 +2247,7 @@ static enum dc_status deallocate_mst_payload(struct pipe_ctx *pipe_ctx)
struct link_encoder *link_encoder = link->link_enc;
struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc;
struct dp_mst_stream_allocation_table proposed_table = {0};
struct fixed31_32 avg_time_slots_per_mtp = dal_fixed31_32_from_int(0);
struct fixed31_32 avg_time_slots_per_mtp = dc_fixpt_from_int(0);
uint8_t i;
bool mst_mode = (link->type == dc_connection_mst_branch);
DC_LOGGER_INIT(link->ctx->logger);

68
drivers/gpu/drm/amd/display/dc/core/dc_resource.c
View File

@@ -496,9 +496,9 @@ static void calculate_viewport(struct pipe_ctx *pipe_ctx)
data->viewport_c.x = data->viewport.x / vpc_div;
data->viewport_c.y = data->viewport.y / vpc_div;
data->inits.h_c = (data->viewport.x % vpc_div) != 0 ?
dal_fixed31_32_half : dal_fixed31_32_zero;
dc_fixpt_half : dc_fixpt_zero;
data->inits.v_c = (data->viewport.y % vpc_div) != 0 ?
dal_fixed31_32_half : dal_fixed31_32_zero;
dc_fixpt_half : dc_fixpt_zero;
/* Round up, assume original video size always even dimensions */
data->viewport_c.width = (data->viewport.width + vpc_div - 1) / vpc_div;
data->viewport_c.height = (data->viewport.height + vpc_div - 1) / vpc_div;
@@ -627,10 +627,10 @@ static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx)
pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270)
rect_swap_helper(&surf_src);
pipe_ctx->plane_res.scl_data.ratios.horz = dal_fixed31_32_from_fraction(
pipe_ctx->plane_res.scl_data.ratios.horz = dc_fixpt_from_fraction(
surf_src.width,
plane_state->dst_rect.width);
pipe_ctx->plane_res.scl_data.ratios.vert = dal_fixed31_32_from_fraction(
pipe_ctx->plane_res.scl_data.ratios.vert = dc_fixpt_from_fraction(
surf_src.height,
plane_state->dst_rect.height);
@@ -688,32 +688,32 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
* init_bot = init + scaling_ratio
* init_c = init + truncated_vp_c_offset(from calculate viewport)
*/
data->inits.h = dal_fixed31_32_div_int(
dal_fixed31_32_add_int(data->ratios.horz, data->taps.h_taps + 1), 2);
data->inits.h = dc_fixpt_div_int(
dc_fixpt_add_int(data->ratios.horz, data->taps.h_taps + 1), 2);
data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_div_int(
dal_fixed31_32_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2));
data->inits.h_c = dc_fixpt_add(data->inits.h_c, dc_fixpt_div_int(
dc_fixpt_add_int(data->ratios.horz_c, data->taps.h_taps_c + 1), 2));
data->inits.v = dal_fixed31_32_div_int(
dal_fixed31_32_add_int(data->ratios.vert, data->taps.v_taps + 1), 2);
data->inits.v = dc_fixpt_div_int(
dc_fixpt_add_int(data->ratios.vert, data->taps.v_taps + 1), 2);
data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_div_int(
dal_fixed31_32_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2));
data->inits.v_c = dc_fixpt_add(data->inits.v_c, dc_fixpt_div_int(
dc_fixpt_add_int(data->ratios.vert_c, data->taps.v_taps_c + 1), 2));
/* Adjust for viewport end clip-off */
if ((data->viewport.x + data->viewport.width) < (src.x + src.width) && !flip_horz_scan_dir) {
int vp_clip = src.x + src.width - data->viewport.width - data->viewport.x;
int int_part = dal_fixed31_32_floor(
dal_fixed31_32_sub(data->inits.h, data->ratios.horz));
int int_part = dc_fixpt_floor(
dc_fixpt_sub(data->inits.h, data->ratios.horz));
int_part = int_part > 0 ? int_part : 0;
data->viewport.width += int_part < vp_clip ? int_part : vp_clip;
}
if ((data->viewport.y + data->viewport.height) < (src.y + src.height) && !flip_vert_scan_dir) {
int vp_clip = src.y + src.height - data->viewport.height - data->viewport.y;
int int_part = dal_fixed31_32_floor(
dal_fixed31_32_sub(data->inits.v, data->ratios.vert));
int int_part = dc_fixpt_floor(
dc_fixpt_sub(data->inits.v, data->ratios.vert));
int_part = int_part > 0 ? int_part : 0;
data->viewport.height += int_part < vp_clip ? int_part : vp_clip;
@@ -721,8 +721,8 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
if ((data->viewport_c.x + data->viewport_c.width) < (src.x + src.width) / vpc_div && !flip_horz_scan_dir) {
int vp_clip = (src.x + src.width) / vpc_div -
data->viewport_c.width - data->viewport_c.x;
int int_part = dal_fixed31_32_floor(
dal_fixed31_32_sub(data->inits.h_c, data->ratios.horz_c));
int int_part = dc_fixpt_floor(
dc_fixpt_sub(data->inits.h_c, data->ratios.horz_c));
int_part = int_part > 0 ? int_part : 0;
data->viewport_c.width += int_part < vp_clip ? int_part : vp_clip;
@@ -730,8 +730,8 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
if ((data->viewport_c.y + data->viewport_c.height) < (src.y + src.height) / vpc_div && !flip_vert_scan_dir) {
int vp_clip = (src.y + src.height) / vpc_div -
data->viewport_c.height - data->viewport_c.y;
int int_part = dal_fixed31_32_floor(
dal_fixed31_32_sub(data->inits.v_c, data->ratios.vert_c));
int int_part = dc_fixpt_floor(
dc_fixpt_sub(data->inits.v_c, data->ratios.vert_c));
int_part = int_part > 0 ? int_part : 0;
data->viewport_c.height += int_part < vp_clip ? int_part : vp_clip;
@@ -741,9 +741,9 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
if (data->viewport.x && !flip_horz_scan_dir) {
int int_part;
data->inits.h = dal_fixed31_32_add(data->inits.h, dal_fixed31_32_mul_int(
data->inits.h = dc_fixpt_add(data->inits.h, dc_fixpt_mul_int(
data->ratios.horz, recout_skip->width));
int_part = dal_fixed31_32_floor(data->inits.h) - data->viewport.x;
int_part = dc_fixpt_floor(data->inits.h) - data->viewport.x;
if (int_part < data->taps.h_taps) {
int int_adj = data->viewport.x >= (data->taps.h_taps - int_part) ?
(data->taps.h_taps - int_part) : data->viewport.x;
@@ -756,15 +756,15 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
int_part = data->taps.h_taps;
}
data->inits.h.value &= 0xffffffff;
data->inits.h = dal_fixed31_32_add_int(data->inits.h, int_part);
data->inits.h = dc_fixpt_add_int(data->inits.h, int_part);
}
if (data->viewport_c.x && !flip_horz_scan_dir) {
int int_part;
data->inits.h_c = dal_fixed31_32_add(data->inits.h_c, dal_fixed31_32_mul_int(
data->inits.h_c = dc_fixpt_add(data->inits.h_c, dc_fixpt_mul_int(
data->ratios.horz_c, recout_skip->width));
int_part = dal_fixed31_32_floor(data->inits.h_c) - data->viewport_c.x;
int_part = dc_fixpt_floor(data->inits.h_c) - data->viewport_c.x;
if (int_part < data->taps.h_taps_c) {
int int_adj = data->viewport_c.x >= (data->taps.h_taps_c - int_part) ?
(data->taps.h_taps_c - int_part) : data->viewport_c.x;
@@ -777,15 +777,15 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
int_part = data->taps.h_taps_c;
}
data->inits.h_c.value &= 0xffffffff;
data->inits.h_c = dal_fixed31_32_add_int(data->inits.h_c, int_part);
data->inits.h_c = dc_fixpt_add_int(data->inits.h_c, int_part);
}
if (data->viewport.y && !flip_vert_scan_dir) {
int int_part;
data->inits.v = dal_fixed31_32_add(data->inits.v, dal_fixed31_32_mul_int(
data->inits.v = dc_fixpt_add(data->inits.v, dc_fixpt_mul_int(
data->ratios.vert, recout_skip->height));
int_part = dal_fixed31_32_floor(data->inits.v) - data->viewport.y;
int_part = dc_fixpt_floor(data->inits.v) - data->viewport.y;
if (int_part < data->taps.v_taps) {
int int_adj = data->viewport.y >= (data->taps.v_taps - int_part) ?
(data->taps.v_taps - int_part) : data->viewport.y;
@@ -798,15 +798,15 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
int_part = data->taps.v_taps;
}
data->inits.v.value &= 0xffffffff;
data->inits.v = dal_fixed31_32_add_int(data->inits.v, int_part);
data->inits.v = dc_fixpt_add_int(data->inits.v, int_part);
}
if (data->viewport_c.y && !flip_vert_scan_dir) {
int int_part;
data->inits.v_c = dal_fixed31_32_add(data->inits.v_c, dal_fixed31_32_mul_int(
data->inits.v_c = dc_fixpt_add(data->inits.v_c, dc_fixpt_mul_int(
data->ratios.vert_c, recout_skip->height));
int_part = dal_fixed31_32_floor(data->inits.v_c) - data->viewport_c.y;
int_part = dc_fixpt_floor(data->inits.v_c) - data->viewport_c.y;
if (int_part < data->taps.v_taps_c) {
int int_adj = data->viewport_c.y >= (data->taps.v_taps_c - int_part) ?
(data->taps.v_taps_c - int_part) : data->viewport_c.y;
@@ -819,12 +819,12 @@ static void calculate_inits_and_adj_vp(struct pipe_ctx *pipe_ctx, struct view *r
int_part = data->taps.v_taps_c;
}
data->inits.v_c.value &= 0xffffffff;
data->inits.v_c = dal_fixed31_32_add_int(data->inits.v_c, int_part);
data->inits.v_c = dc_fixpt_add_int(data->inits.v_c, int_part);
}
/* Interlaced inits based on final vert inits */
data->inits.v_bot = dal_fixed31_32_add(data->inits.v, data->ratios.vert);
data->inits.v_c_bot = dal_fixed31_32_add(data->inits.v_c, data->ratios.vert_c);
data->inits.v_bot = dc_fixpt_add(data->inits.v, data->ratios.vert);
data->inits.v_c_bot = dc_fixpt_add(data->inits.v_c, data->ratios.vert_c);
if (pipe_ctx->plane_state->rotation == ROTATION_ANGLE_90 ||
pipe_ctx->plane_state->rotation == ROTATION_ANGLE_270) {

2
drivers/gpu/drm/amd/display/dc/dc_dp_types.h
View File

@@ -26,6 +26,8 @@
#ifndef DC_DP_TYPES_H
#define DC_DP_TYPES_H
#include "os_types.h"
enum dc_lane_count {
LANE_COUNT_UNKNOWN = 0,
LANE_COUNT_ONE = 1,

2
drivers/gpu/drm/amd/display/dc/dc_types.h
View File

@@ -25,7 +25,7 @@
#ifndef DC_TYPES_H_
#define DC_TYPES_H_
#include "fixed32_32.h"
#include "os_types.h"
#include "fixed31_32.h"
#include "irq_types.h"
#include "dc_dp_types.h"

2
drivers/gpu/drm/amd/display/dc/dce/dce_abm.c
View File

@@ -26,7 +26,7 @@
#include "dce_abm.h"
#include "dm_services.h"
#include "reg_helper.h"
#include "fixed32_32.h"
#include "fixed31_32.h"
#include "dc.h"
#include "atom.h"

60
drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.c
View File

@@ -657,12 +657,12 @@ static uint32_t dce110_get_d_to_pixel_rate_in_hz(
return 0;
}
pix_rate = dal_fixed31_32_from_int(clk_src->ref_freq_khz);
pix_rate = dal_fixed31_32_mul_int(pix_rate, 1000);
pix_rate = dal_fixed31_32_mul_int(pix_rate, phase);
pix_rate = dal_fixed31_32_div_int(pix_rate, modulo);
pix_rate = dc_fixpt_from_int(clk_src->ref_freq_khz);
pix_rate = dc_fixpt_mul_int(pix_rate, 1000);
pix_rate = dc_fixpt_mul_int(pix_rate, phase);
pix_rate = dc_fixpt_div_int(pix_rate, modulo);
return dal_fixed31_32_round(pix_rate);
return dc_fixpt_round(pix_rate);
} else {
return dce110_get_dp_pixel_rate_from_combo_phy_pll(cs, pix_clk_params, pll_settings);
}
@@ -711,12 +711,12 @@ static bool calculate_ss(
const struct spread_spectrum_data *ss_data,
struct delta_sigma_data *ds_data)
{
struct fixed32_32 fb_div;
struct fixed32_32 ss_amount;
struct fixed32_32 ss_nslip_amount;
struct fixed32_32 ss_ds_frac_amount;
struct fixed32_32 ss_step_size;
struct fixed32_32 modulation_time;
struct fixed31_32 fb_div;
struct fixed31_32 ss_amount;
struct fixed31_32 ss_nslip_amount;
struct fixed31_32 ss_ds_frac_amount;
struct fixed31_32 ss_step_size;
struct fixed31_32 modulation_time;
if (ds_data == NULL)
return false;
@@ -731,42 +731,42 @@ static bool calculate_ss(
/* compute SS_AMOUNT_FBDIV & SS_AMOUNT_NFRAC_SLIP & SS_AMOUNT_DSFRAC*/
/* 6 decimal point support in fractional feedback divider */
fb_div = dal_fixed32_32_from_fraction(
fb_div = dc_fixpt_from_fraction(
pll_settings->fract_feedback_divider, 1000000);
fb_div = dal_fixed32_32_add_int(fb_div, pll_settings->feedback_divider);
fb_div = dc_fixpt_add_int(fb_div, pll_settings->feedback_divider);
ds_data->ds_frac_amount = 0;
/*spreadSpectrumPercentage is in the unit of .01%,
* so have to divided by 100 * 100*/
ss_amount = dal_fixed32_32_mul(
fb_div, dal_fixed32_32_from_fraction(ss_data->percentage,
ss_amount = dc_fixpt_mul(
fb_div, dc_fixpt_from_fraction(ss_data->percentage,
100 * ss_data->percentage_divider));
ds_data->feedback_amount = dal_fixed32_32_floor(ss_amount);
ds_data->feedback_amount = dc_fixpt_floor(ss_amount);
ss_nslip_amount = dal_fixed32_32_sub(ss_amount,
dal_fixed32_32_from_int(ds_data->feedback_amount));
ss_nslip_amount = dal_fixed32_32_mul_int(ss_nslip_amount, 10);
ds_data->nfrac_amount = dal_fixed32_32_floor(ss_nslip_amount);
ss_nslip_amount = dc_fixpt_sub(ss_amount,
dc_fixpt_from_int(ds_data->feedback_amount));
ss_nslip_amount = dc_fixpt_mul_int(ss_nslip_amount, 10);
ds_data->nfrac_amount = dc_fixpt_floor(ss_nslip_amount);
ss_ds_frac_amount = dal_fixed32_32_sub(ss_nslip_amount,
dal_fixed32_32_from_int(ds_data->nfrac_amount));
ss_ds_frac_amount = dal_fixed32_32_mul_int(ss_ds_frac_amount, 65536);
ds_data->ds_frac_amount = dal_fixed32_32_floor(ss_ds_frac_amount);
ss_ds_frac_amount = dc_fixpt_sub(ss_nslip_amount,
dc_fixpt_from_int(ds_data->nfrac_amount));
ss_ds_frac_amount = dc_fixpt_mul_int(ss_ds_frac_amount, 65536);
ds_data->ds_frac_amount = dc_fixpt_floor(ss_ds_frac_amount);
/* compute SS_STEP_SIZE_DSFRAC */
modulation_time = dal_fixed32_32_from_fraction(
modulation_time = dc_fixpt_from_fraction(
pll_settings->reference_freq * 1000,
pll_settings->reference_divider * ss_data->modulation_freq_hz);
if (ss_data->flags.CENTER_SPREAD)
modulation_time = dal_fixed32_32_div_int(modulation_time, 4);
modulation_time = dc_fixpt_div_int(modulation_time, 4);
else
modulation_time = dal_fixed32_32_div_int(modulation_time, 2);
modulation_time = dc_fixpt_div_int(modulation_time, 2);
ss_step_size = dal_fixed32_32_div(ss_amount, modulation_time);
ss_step_size = dc_fixpt_div(ss_amount, modulation_time);
/* SS_STEP_SIZE_DSFRAC_DEC = Int(SS_STEP_SIZE * 2 ^ 16 * 10)*/
ss_step_size = dal_fixed32_32_mul_int(ss_step_size, 65536 * 10);
ds_data->ds_frac_size = dal_fixed32_32_floor(ss_step_size);
ss_step_size = dc_fixpt_mul_int(ss_step_size, 65536 * 10);
ds_data->ds_frac_size = dc_fixpt_floor(ss_step_size);
return true;
}

26
drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c
View File

@@ -26,7 +26,7 @@
#include "dce_clocks.h"
#include "dm_services.h"
#include "reg_helper.h"
#include "fixed32_32.h"
#include "fixed31_32.h"
#include "bios_parser_interface.h"
#include "dc.h"
#include "dmcu.h"
@@ -228,19 +228,19 @@ static int dce_clocks_get_dp_ref_freq(struct display_clock *clk)
generated according to average value (case as with previous ASICs)
*/
if (clk_dce->ss_on_dprefclk && clk_dce->dprefclk_ss_divider != 0) {
struct fixed32_32 ss_percentage = dal_fixed32_32_div_int(
dal_fixed32_32_from_fraction(
struct fixed31_32 ss_percentage = dc_fixpt_div_int(
dc_fixpt_from_fraction(
clk_dce->dprefclk_ss_percentage,
clk_dce->dprefclk_ss_divider), 200);
struct fixed32_32 adj_dp_ref_clk_khz;
struct fixed31_32 adj_dp_ref_clk_khz;
ss_percentage = dal_fixed32_32_sub(dal_fixed32_32_one,
ss_percentage = dc_fixpt_sub(dc_fixpt_one,
ss_percentage);
adj_dp_ref_clk_khz =
dal_fixed32_32_mul_int(
dc_fixpt_mul_int(
ss_percentage,
dp_ref_clk_khz);
dp_ref_clk_khz = dal_fixed32_32_floor(adj_dp_ref_clk_khz);
dp_ref_clk_khz = dc_fixpt_floor(adj_dp_ref_clk_khz);
}
return dp_ref_clk_khz;
@@ -256,19 +256,19 @@ static int dce_clocks_get_dp_ref_freq_wrkaround(struct display_clock *clk)
int dp_ref_clk_khz = 600000;
if (clk_dce->ss_on_dprefclk && clk_dce->dprefclk_ss_divider != 0) {
struct fixed32_32 ss_percentage = dal_fixed32_32_div_int(
dal_fixed32_32_from_fraction(
struct fixed31_32 ss_percentage = dc_fixpt_div_int(
dc_fixpt_from_fraction(
clk_dce->dprefclk_ss_percentage,
clk_dce->dprefclk_ss_divider), 200);
struct fixed32_32 adj_dp_ref_clk_khz;
struct fixed31_32 adj_dp_ref_clk_khz;
ss_percentage = dal_fixed32_32_sub(dal_fixed32_32_one,
ss_percentage = dc_fixpt_sub(dc_fixpt_one,
ss_percentage);
adj_dp_ref_clk_khz =
dal_fixed32_32_mul_int(
dc_fixpt_mul_int(
ss_percentage,
dp_ref_clk_khz);
dp_ref_clk_khz = dal_fixed32_32_floor(adj_dp_ref_clk_khz);
dp_ref_clk_khz = dc_fixpt_floor(adj_dp_ref_clk_khz);
}
return dp_ref_clk_khz;

2
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
View File

@@ -28,7 +28,7 @@
#include "dce_dmcu.h"
#include "dm_services.h"
#include "reg_helper.h"
#include "fixed32_32.h"
#include "fixed31_32.h"
#include "dc.h"
#define TO_DCE_DMCU(dmcu)\

6
drivers/gpu/drm/amd/display/dc/dce/dce_ipp.c
View File

@@ -195,13 +195,13 @@ static void dce_ipp_program_input_lut(
for (i = 0; i < gamma->num_entries; i++) {
REG_SET(DC_LUT_SEQ_COLOR, 0, DC_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.red[i]));
REG_SET(DC_LUT_SEQ_COLOR, 0, DC_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.green[i]));
REG_SET(DC_LUT_SEQ_COLOR, 0, DC_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.blue[i]));
}

48
drivers/gpu/drm/amd/display/dc/dce/dce_scl_filters.c
View File

@@ -1014,11 +1014,11 @@ static const uint16_t filter_8tap_64p_183[264] = {
const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_3tap_16p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_3tap_16p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_3tap_16p_150;
else
return filter_3tap_16p_183;
@@ -1026,11 +1026,11 @@ const uint16_t *get_filter_3tap_16p(struct fixed31_32 ratio)
const uint16_t *get_filter_3tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_3tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_3tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_3tap_64p_150;
else
return filter_3tap_64p_183;
@@ -1038,11 +1038,11 @@ const uint16_t *get_filter_3tap_64p(struct fixed31_32 ratio)
const uint16_t *get_filter_4tap_16p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_4tap_16p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_4tap_16p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_4tap_16p_150;
else
return filter_4tap_16p_183;
@@ -1050,11 +1050,11 @@ const uint16_t *get_filter_4tap_16p(struct fixed31_32 ratio)
const uint16_t *get_filter_4tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_4tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_4tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_4tap_64p_150;
else
return filter_4tap_64p_183;
@@ -1062,11 +1062,11 @@ const uint16_t *get_filter_4tap_64p(struct fixed31_32 ratio)
const uint16_t *get_filter_5tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_5tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_5tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_5tap_64p_150;
else
return filter_5tap_64p_183;
@@ -1074,11 +1074,11 @@ const uint16_t *get_filter_5tap_64p(struct fixed31_32 ratio)
const uint16_t *get_filter_6tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_6tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_6tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_6tap_64p_150;
else
return filter_6tap_64p_183;
@@ -1086,11 +1086,11 @@ const uint16_t *get_filter_6tap_64p(struct fixed31_32 ratio)
const uint16_t *get_filter_7tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_7tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_7tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_7tap_64p_150;
else
return filter_7tap_64p_183;
@@ -1098,11 +1098,11 @@ const uint16_t *get_filter_7tap_64p(struct fixed31_32 ratio)
const uint16_t *get_filter_8tap_64p(struct fixed31_32 ratio)
{
if (ratio.value < dal_fixed31_32_one.value)
if (ratio.value < dc_fixpt_one.value)
return filter_8tap_64p_upscale;
else if (ratio.value < dal_fixed31_32_from_fraction(4, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(4, 3).value)
return filter_8tap_64p_117;
else if (ratio.value < dal_fixed31_32_from_fraction(5, 3).value)
else if (ratio.value < dc_fixpt_from_fraction(5, 3).value)
return filter_8tap_64p_150;
else
return filter_8tap_64p_183;

8
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
View File

@@ -683,11 +683,11 @@ static void dce110_stream_encoder_set_mst_bandwidth(
struct fixed31_32 avg_time_slots_per_mtp)
{
struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
uint32_t x = dal_fixed31_32_floor(
uint32_t x = dc_fixpt_floor(
avg_time_slots_per_mtp);
uint32_t y = dal_fixed31_32_ceil(
dal_fixed31_32_shl(
dal_fixed31_32_sub_int(
uint32_t y = dc_fixpt_ceil(
dc_fixpt_shl(
dc_fixpt_sub_int(
avg_time_slots_per_mtp,
x),
26));

26
drivers/gpu/drm/amd/display/dc/dce/dce_transform.c
View File

@@ -41,7 +41,7 @@
#define DC_LOGGER \
xfm_dce->base.ctx->logger
#define IDENTITY_RATIO(ratio) (dal_fixed31_32_u2d19(ratio) == (1 << 19))
#define IDENTITY_RATIO(ratio) (dc_fixpt_u2d19(ratio) == (1 << 19))
#define GAMUT_MATRIX_SIZE 12
#define SCL_PHASES 16
@@ -256,27 +256,27 @@ static void calculate_inits(
struct fixed31_32 v_init;
inits->h_int_scale_ratio =
dal_fixed31_32_u2d19(data->ratios.horz) << 5;
dc_fixpt_u2d19(data->ratios.horz) << 5;
inits->v_int_scale_ratio =
dal_fixed31_32_u2d19(data->ratios.vert) << 5;
dc_fixpt_u2d19(data->ratios.vert) << 5;
h_init =
dal_fixed31_32_div_int(
dal_fixed31_32_add(
dc_fixpt_div_int(
dc_fixpt_add(
data->ratios.horz,
dal_fixed31_32_from_int(data->taps.h_taps + 1)),
dc_fixpt_from_int(data->taps.h_taps + 1)),
2);
inits->h_init.integer = dal_fixed31_32_floor(h_init);
inits->h_init.fraction = dal_fixed31_32_u0d19(h_init) << 5;
inits->h_init.integer = dc_fixpt_floor(h_init);
inits->h_init.fraction = dc_fixpt_u0d19(h_init) << 5;
v_init =
dal_fixed31_32_div_int(
dal_fixed31_32_add(
dc_fixpt_div_int(
dc_fixpt_add(
data->ratios.vert,
dal_fixed31_32_from_int(data->taps.v_taps + 1)),
dc_fixpt_from_int(data->taps.v_taps + 1)),
2);
inits->v_init.integer = dal_fixed31_32_floor(v_init);
inits->v_init.fraction = dal_fixed31_32_u0d19(v_init) << 5;
inits->v_init.integer = dc_fixpt_floor(v_init);
inits->v_init.fraction = dc_fixpt_u0d19(v_init) << 5;
}
static void program_scl_ratios_inits(

36
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View File

@@ -509,19 +509,19 @@ dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
rgb_resulted[hw_points - 1].green = output_tf->tf_pts.green[start_index];
rgb_resulted[hw_points - 1].blue = output_tf->tf_pts.blue[start_index];
arr_points[0].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_start));
arr_points[1].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_end));
arr_points[0].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_start));
arr_points[1].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_end));
y_r = rgb_resulted[0].red;
y_g = rgb_resulted[0].green;
y_b = rgb_resulted[0].blue;
y1_min = dal_fixed31_32_min(y_r, dal_fixed31_32_min(y_g, y_b));
y1_min = dc_fixpt_min(y_r, dc_fixpt_min(y_g, y_b));
arr_points[0].y = y1_min;
arr_points[0].slope = dal_fixed31_32_div(arr_points[0].y,
arr_points[0].slope = dc_fixpt_div(arr_points[0].y,
arr_points[0].x);
y_r = rgb_resulted[hw_points - 1].red;
@@ -531,21 +531,21 @@ dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
/* see comment above, m_arrPoints[1].y should be the Y value for the
* region end (m_numOfHwPoints), not last HW point(m_numOfHwPoints - 1)
*/
y3_max = dal_fixed31_32_max(y_r, dal_fixed31_32_max(y_g, y_b));
y3_max = dc_fixpt_max(y_r, dc_fixpt_max(y_g, y_b));
arr_points[1].y = y3_max;
arr_points[1].slope = dal_fixed31_32_zero;
arr_points[1].slope = dc_fixpt_zero;
if (output_tf->tf == TRANSFER_FUNCTION_PQ) {
/* for PQ, we want to have a straight line from last HW X point,
* and the slope to be such that we hit 1.0 at 10000 nits.
*/
const struct fixed31_32 end_value = dal_fixed31_32_from_int(125);
const struct fixed31_32 end_value = dc_fixpt_from_int(125);
arr_points[1].slope = dal_fixed31_32_div(
dal_fixed31_32_sub(dal_fixed31_32_one, arr_points[1].y),
dal_fixed31_32_sub(end_value, arr_points[1].x));
arr_points[1].slope = dc_fixpt_div(
dc_fixpt_sub(dc_fixpt_one, arr_points[1].y),
dc_fixpt_sub(end_value, arr_points[1].x));
}
regamma_params->hw_points_num = hw_points;
@@ -569,16 +569,16 @@ dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
i = 1;
while (i != hw_points + 1) {
if (dal_fixed31_32_lt(rgb_plus_1->red, rgb->red))
if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
rgb_plus_1->red = rgb->red;
if (dal_fixed31_32_lt(rgb_plus_1->green, rgb->green))
if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))
rgb_plus_1->green = rgb->green;
if (dal_fixed31_32_lt(rgb_plus_1->blue, rgb->blue))
if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))
rgb_plus_1->blue = rgb->blue;
rgb->delta_red = dal_fixed31_32_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dal_fixed31_32_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dal_fixed31_32_sub(rgb_plus_1->blue, rgb->blue);
rgb->delta_red = dc_fixpt_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dc_fixpt_sub(rgb_plus_1->blue, rgb->blue);
++rgb_plus_1;
++rgb;

8
drivers/gpu/drm/amd/display/dc/dce110/dce110_transform_v.c
View File

@@ -373,13 +373,13 @@ static void calculate_inits(
struct rect *chroma_viewport)
{
inits->h_int_scale_ratio_luma =
dal_fixed31_32_u2d19(data->ratios.horz) << 5;
dc_fixpt_u2d19(data->ratios.horz) << 5;
inits->v_int_scale_ratio_luma =
dal_fixed31_32_u2d19(data->ratios.vert) << 5;
dc_fixpt_u2d19(data->ratios.vert) << 5;
inits->h_int_scale_ratio_chroma =
dal_fixed31_32_u2d19(data->ratios.horz_c) << 5;
dc_fixpt_u2d19(data->ratios.horz_c) << 5;
inits->v_int_scale_ratio_chroma =
dal_fixed31_32_u2d19(data->ratios.vert_c) << 5;
dc_fixpt_u2d19(data->ratios.vert_c) << 5;
inits->h_init_luma.integer = 1;
inits->v_init_luma.integer = 1;

86
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_cm_common.c
View File

@@ -169,7 +169,7 @@ bool cm_helper_convert_to_custom_float(
}
if (fixpoint == true)
arr_points[1].custom_float_y = dal_fixed31_32_clamp_u0d14(arr_points[1].y);
arr_points[1].custom_float_y = dc_fixpt_clamp_u0d14(arr_points[1].y);
else if (!convert_to_custom_float_format(arr_points[1].y, &fmt,
&arr_points[1].custom_float_y)) {
BREAK_TO_DEBUGGER();
@@ -327,19 +327,19 @@ bool cm_helper_translate_curve_to_hw_format(
rgb_resulted[hw_points - 1].green = output_tf->tf_pts.green[start_index];
rgb_resulted[hw_points - 1].blue = output_tf->tf_pts.blue[start_index];
arr_points[0].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_start));
arr_points[1].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_end));
arr_points[0].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_start));
arr_points[1].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_end));
y_r = rgb_resulted[0].red;
y_g = rgb_resulted[0].green;
y_b = rgb_resulted[0].blue;
y1_min = dal_fixed31_32_min(y_r, dal_fixed31_32_min(y_g, y_b));
y1_min = dc_fixpt_min(y_r, dc_fixpt_min(y_g, y_b));
arr_points[0].y = y1_min;
arr_points[0].slope = dal_fixed31_32_div(arr_points[0].y, arr_points[0].x);
arr_points[0].slope = dc_fixpt_div(arr_points[0].y, arr_points[0].x);
y_r = rgb_resulted[hw_points - 1].red;
y_g = rgb_resulted[hw_points - 1].green;
y_b = rgb_resulted[hw_points - 1].blue;
@@ -347,22 +347,22 @@ bool cm_helper_translate_curve_to_hw_format(
/* see comment above, m_arrPoints[1].y should be the Y value for the
* region end (m_numOfHwPoints), not last HW point(m_numOfHwPoints - 1)
*/
y3_max = dal_fixed31_32_max(y_r, dal_fixed31_32_max(y_g, y_b));
y3_max = dc_fixpt_max(y_r, dc_fixpt_max(y_g, y_b));
arr_points[1].y = y3_max;
arr_points[1].slope = dal_fixed31_32_zero;
arr_points[1].slope = dc_fixpt_zero;
if (output_tf->tf == TRANSFER_FUNCTION_PQ) {
/* for PQ, we want to have a straight line from last HW X point,
* and the slope to be such that we hit 1.0 at 10000 nits.
*/
const struct fixed31_32 end_value =
dal_fixed31_32_from_int(125);
dc_fixpt_from_int(125);
arr_points[1].slope = dal_fixed31_32_div(
dal_fixed31_32_sub(dal_fixed31_32_one, arr_points[1].y),
dal_fixed31_32_sub(end_value, arr_points[1].x));
arr_points[1].slope = dc_fixpt_div(
dc_fixpt_sub(dc_fixpt_one, arr_points[1].y),
dc_fixpt_sub(end_value, arr_points[1].x));
}
lut_params->hw_points_num = hw_points;
@@ -386,24 +386,24 @@ bool cm_helper_translate_curve_to_hw_format(
i = 1;
while (i != hw_points + 1) {
if (dal_fixed31_32_lt(rgb_plus_1->red, rgb->red))
if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
rgb_plus_1->red = rgb->red;
if (dal_fixed31_32_lt(rgb_plus_1->green, rgb->green))
if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))
rgb_plus_1->green = rgb->green;
if (dal_fixed31_32_lt(rgb_plus_1->blue, rgb->blue))
if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))
rgb_plus_1->blue = rgb->blue;
rgb->delta_red = dal_fixed31_32_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dal_fixed31_32_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dal_fixed31_32_sub(rgb_plus_1->blue, rgb->blue);
rgb->delta_red = dc_fixpt_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dc_fixpt_sub(rgb_plus_1->blue, rgb->blue);
if (fixpoint == true) {
rgb->delta_red_reg = dal_fixed31_32_clamp_u0d10(rgb->delta_red);
rgb->delta_green_reg = dal_fixed31_32_clamp_u0d10(rgb->delta_green);
rgb->delta_blue_reg = dal_fixed31_32_clamp_u0d10(rgb->delta_blue);
rgb->red_reg = dal_fixed31_32_clamp_u0d14(rgb->red);
rgb->green_reg = dal_fixed31_32_clamp_u0d14(rgb->green);
rgb->blue_reg = dal_fixed31_32_clamp_u0d14(rgb->blue);
rgb->delta_red_reg = dc_fixpt_clamp_u0d10(rgb->delta_red);
rgb->delta_green_reg = dc_fixpt_clamp_u0d10(rgb->delta_green);
rgb->delta_blue_reg = dc_fixpt_clamp_u0d10(rgb->delta_blue);
rgb->red_reg = dc_fixpt_clamp_u0d14(rgb->red);
rgb->green_reg = dc_fixpt_clamp_u0d14(rgb->green);
rgb->blue_reg = dc_fixpt_clamp_u0d14(rgb->blue);
}
++rgb_plus_1;
@@ -489,19 +489,19 @@ bool cm_helper_translate_curve_to_degamma_hw_format(
rgb_resulted[hw_points - 1].green = output_tf->tf_pts.green[start_index];
rgb_resulted[hw_points - 1].blue = output_tf->tf_pts.blue[start_index];
arr_points[0].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_start));
arr_points[1].x = dal_fixed31_32_pow(dal_fixed31_32_from_int(2),
dal_fixed31_32_from_int(region_end));
arr_points[0].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_start));
arr_points[1].x = dc_fixpt_pow(dc_fixpt_from_int(2),
dc_fixpt_from_int(region_end));
y_r = rgb_resulted[0].red;
y_g = rgb_resulted[0].green;
y_b = rgb_resulted[0].blue;
y1_min = dal_fixed31_32_min(y_r, dal_fixed31_32_min(y_g, y_b));
y1_min = dc_fixpt_min(y_r, dc_fixpt_min(y_g, y_b));
arr_points[0].y = y1_min;
arr_points[0].slope = dal_fixed31_32_div(arr_points[0].y, arr_points[0].x);
arr_points[0].slope = dc_fixpt_div(arr_points[0].y, arr_points[0].x);
y_r = rgb_resulted[hw_points - 1].red;
y_g = rgb_resulted[hw_points - 1].green;
y_b = rgb_resulted[hw_points - 1].blue;
@@ -509,22 +509,22 @@ bool cm_helper_translate_curve_to_degamma_hw_format(
/* see comment above, m_arrPoints[1].y should be the Y value for the
* region end (m_numOfHwPoints), not last HW point(m_numOfHwPoints - 1)
*/
y3_max = dal_fixed31_32_max(y_r, dal_fixed31_32_max(y_g, y_b));
y3_max = dc_fixpt_max(y_r, dc_fixpt_max(y_g, y_b));
arr_points[1].y = y3_max;
arr_points[1].slope = dal_fixed31_32_zero;
arr_points[1].slope = dc_fixpt_zero;
if (output_tf->tf == TRANSFER_FUNCTION_PQ) {
/* for PQ, we want to have a straight line from last HW X point,
* and the slope to be such that we hit 1.0 at 10000 nits.
*/
const struct fixed31_32 end_value =
dal_fixed31_32_from_int(125);
dc_fixpt_from_int(125);
arr_points[1].slope = dal_fixed31_32_div(
dal_fixed31_32_sub(dal_fixed31_32_one, arr_points[1].y),
dal_fixed31_32_sub(end_value, arr_points[1].x));
arr_points[1].slope = dc_fixpt_div(
dc_fixpt_sub(dc_fixpt_one, arr_points[1].y),
dc_fixpt_sub(end_value, arr_points[1].x));
}
lut_params->hw_points_num = hw_points;
@@ -548,16 +548,16 @@ bool cm_helper_translate_curve_to_degamma_hw_format(
i = 1;
while (i != hw_points + 1) {
if (dal_fixed31_32_lt(rgb_plus_1->red, rgb->red))
if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
rgb_plus_1->red = rgb->red;
if (dal_fixed31_32_lt(rgb_plus_1->green, rgb->green))
if (dc_fixpt_lt(rgb_plus_1->green, rgb->green))
rgb_plus_1->green = rgb->green;
if (dal_fixed31_32_lt(rgb_plus_1->blue, rgb->blue))
if (dc_fixpt_lt(rgb_plus_1->blue, rgb->blue))
rgb_plus_1->blue = rgb->blue;
rgb->delta_red = dal_fixed31_32_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dal_fixed31_32_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dal_fixed31_32_sub(rgb_plus_1->blue, rgb->blue);
rgb->delta_red = dc_fixpt_sub(rgb_plus_1->red, rgb->red);
rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);
rgb->delta_blue = dc_fixpt_sub(rgb_plus_1->blue, rgb->blue);
++rgb_plus_1;
++rgb;

2
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
View File

@@ -130,7 +130,7 @@ void dpp_set_gamut_remap_bypass(struct dcn10_dpp *dpp)
/* Gamut remap in bypass */
}
#define IDENTITY_RATIO(ratio) (dal_fixed31_32_u2d19(ratio) == (1 << 19))
#define IDENTITY_RATIO(ratio) (dc_fixpt_u2d19(ratio) == (1 << 19))
bool dpp_get_optimal_number_of_taps(

6
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c
View File

@@ -811,13 +811,13 @@ void dpp1_program_input_lut(
REG_UPDATE(CM_IGAM_LUT_RW_INDEX, CM_IGAM_LUT_RW_INDEX, 0);
for (i = 0; i < gamma->num_entries; i++) {
REG_SET(CM_IGAM_LUT_SEQ_COLOR, 0, CM_IGAM_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.red[i]));
REG_SET(CM_IGAM_LUT_SEQ_COLOR, 0, CM_IGAM_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.green[i]));
REG_SET(CM_IGAM_LUT_SEQ_COLOR, 0, CM_IGAM_LUT_SEQ_COLOR,
dal_fixed31_32_round(
dc_fixpt_round(
gamma->entries.blue[i]));
}
// Power off LUT memory

38
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c
View File

@@ -169,7 +169,7 @@ static enum dscl_mode_sel dpp1_dscl_get_dscl_mode(
const struct scaler_data *data,
bool dbg_always_scale)
{
const long long one = dal_fixed31_32_one.value;
const long long one = dc_fixpt_one.value;
if (dpp_base->caps->dscl_data_proc_format == DSCL_DATA_PRCESSING_FIXED_FORMAT) {
/* DSCL is processing data in fixed format */
@@ -464,8 +464,8 @@ static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *d
int num_part_y, num_part_c;
int vtaps = scl_data->taps.v_taps;
int vtaps_c = scl_data->taps.v_taps_c;
int ceil_vratio = dal_fixed31_32_ceil(scl_data->ratios.vert);
int ceil_vratio_c = dal_fixed31_32_ceil(scl_data->ratios.vert_c);
int ceil_vratio = dc_fixpt_ceil(scl_data->ratios.vert);
int ceil_vratio_c = dc_fixpt_ceil(scl_data->ratios.vert_c);
enum lb_memory_config mem_cfg = LB_MEMORY_CONFIG_0;
if (dpp->base.ctx->dc->debug.use_max_lb)
@@ -565,52 +565,52 @@ static void dpp1_dscl_set_manual_ratio_init(
uint32_t init_int = 0;
REG_SET(SCL_HORZ_FILTER_SCALE_RATIO, 0,
SCL_H_SCALE_RATIO, dal_fixed31_32_u2d19(data->ratios.horz) << 5);
SCL_H_SCALE_RATIO, dc_fixpt_u2d19(data->ratios.horz) << 5);
REG_SET(SCL_VERT_FILTER_SCALE_RATIO, 0,
SCL_V_SCALE_RATIO, dal_fixed31_32_u2d19(data->ratios.vert) << 5);
SCL_V_SCALE_RATIO, dc_fixpt_u2d19(data->ratios.vert) << 5);
REG_SET(SCL_HORZ_FILTER_SCALE_RATIO_C, 0,
SCL_H_SCALE_RATIO_C, dal_fixed31_32_u2d19(data->ratios.horz_c) << 5);
SCL_H_SCALE_RATIO_C, dc_fixpt_u2d19(data->ratios.horz_c) << 5);
REG_SET(SCL_VERT_FILTER_SCALE_RATIO_C, 0,
SCL_V_SCALE_RATIO_C, dal_fixed31_32_u2d19(data->ratios.vert_c) << 5);
SCL_V_SCALE_RATIO_C, dc_fixpt_u2d19(data->ratios.vert_c) << 5);
/*
* 0.24 format for fraction, first five bits zeroed
*/
init_frac = dal_fixed31_32_u0d19(data->inits.h) << 5;
init_int = dal_fixed31_32_floor(data->inits.h);
init_frac = dc_fixpt_u0d19(data->inits.h) << 5;
init_int = dc_fixpt_floor(data->inits.h);
REG_SET_2(SCL_HORZ_FILTER_INIT, 0,
SCL_H_INIT_FRAC, init_frac,
SCL_H_INIT_INT, init_int);
init_frac = dal_fixed31_32_u0d19(data->inits.h_c) << 5;
init_int = dal_fixed31_32_floor(data->inits.h_c);
init_frac = dc_fixpt_u0d19(data->inits.h_c) << 5;
init_int = dc_fixpt_floor(data->inits.h_c);
REG_SET_2(SCL_HORZ_FILTER_INIT_C, 0,
SCL_H_INIT_FRAC_C, init_frac,
SCL_H_INIT_INT_C, init_int);
init_frac = dal_fixed31_32_u0d19(data->inits.v) << 5;
init_int = dal_fixed31_32_floor(data->inits.v);
init_frac = dc_fixpt_u0d19(data->inits.v) << 5;
init_int = dc_fixpt_floor(data->inits.v);
REG_SET_2(SCL_VERT_FILTER_INIT, 0,
SCL_V_INIT_FRAC, init_frac,
SCL_V_INIT_INT, init_int);
init_frac = dal_fixed31_32_u0d19(data->inits.v_bot) << 5;
init_int = dal_fixed31_32_floor(data->inits.v_bot);
init_frac = dc_fixpt_u0d19(data->inits.v_bot) << 5;
init_int = dc_fixpt_floor(data->inits.v_bot);
REG_SET_2(SCL_VERT_FILTER_INIT_BOT, 0,
SCL_V_INIT_FRAC_BOT, init_frac,
SCL_V_INIT_INT_BOT, init_int);
init_frac = dal_fixed31_32_u0d19(data->inits.v_c) << 5;
init_int = dal_fixed31_32_floor(data->inits.v_c);
init_frac = dc_fixpt_u0d19(data->inits.v_c) << 5;
init_int = dc_fixpt_floor(data->inits.v_c);
REG_SET_2(SCL_VERT_FILTER_INIT_C, 0,
SCL_V_INIT_FRAC_C, init_frac,
SCL_V_INIT_INT_C, init_int);
init_frac = dal_fixed31_32_u0d19(data->inits.v_c_bot) << 5;
init_int = dal_fixed31_32_floor(data->inits.v_c_bot);
init_frac = dc_fixpt_u0d19(data->inits.v_c_bot) << 5;
init_int = dc_fixpt_floor(data->inits.v_c_bot);
REG_SET_2(SCL_VERT_FILTER_INIT_BOT_C, 0,
SCL_V_INIT_FRAC_BOT_C, init_frac,
SCL_V_INIT_INT_BOT_C, init_int);

4
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
View File

@@ -1054,8 +1054,8 @@ void hubp1_cursor_set_position(
ASSERT(param->h_scale_ratio.value);
if (param->h_scale_ratio.value)
dst_x_offset = dal_fixed31_32_floor(dal_fixed31_32_div(
dal_fixed31_32_from_int(dst_x_offset),
dst_x_offset = dc_fixpt_floor(dc_fixpt_div(
dc_fixpt_from_int(dst_x_offset),
param->h_scale_ratio));
if (src_x_offset >= (int)param->viewport_width)

28
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@@ -1685,22 +1685,22 @@ static uint16_t fixed_point_to_int_frac(
uint16_t result;
uint16_t d = (uint16_t)dal_fixed31_32_floor(
dal_fixed31_32_abs(
uint16_t d = (uint16_t)dc_fixpt_floor(
dc_fixpt_abs(
arg));
if (d <= (uint16_t)(1 << integer_bits) - (1 / (uint16_t)divisor))
numerator = (uint16_t)dal_fixed31_32_floor(
dal_fixed31_32_mul_int(
numerator = (uint16_t)dc_fixpt_floor(
dc_fixpt_mul_int(
arg,
divisor));
else {
numerator = dal_fixed31_32_floor(
dal_fixed31_32_sub(
dal_fixed31_32_from_int(
numerator = dc_fixpt_floor(
dc_fixpt_sub(
dc_fixpt_from_int(
1LL << integer_bits),
dal_fixed31_32_recip(
dal_fixed31_32_from_int(
dc_fixpt_recip(
dc_fixpt_from_int(
divisor))));
}
@@ -1710,8 +1710,8 @@ static uint16_t fixed_point_to_int_frac(
result = (uint16_t)(
(1 << (integer_bits + fractional_bits + 1)) + numerator);
if ((result != 0) && dal_fixed31_32_lt(
arg, dal_fixed31_32_zero))
if ((result != 0) && dc_fixpt_lt(
arg, dc_fixpt_zero))
result |= 1 << (integer_bits + fractional_bits);
return result;
@@ -1725,8 +1725,8 @@ void build_prescale_params(struct dc_bias_and_scale *bias_and_scale,
&& plane_state->input_csc_color_matrix.enable_adjustment
&& plane_state->coeff_reduction_factor.value != 0) {
bias_and_scale->scale_blue = fixed_point_to_int_frac(
dal_fixed31_32_mul(plane_state->coeff_reduction_factor,
dal_fixed31_32_from_fraction(256, 255)),
dc_fixpt_mul(plane_state->coeff_reduction_factor,
dc_fixpt_from_fraction(256, 255)),
2,
13);
bias_and_scale->scale_red = bias_and_scale->scale_blue;
@@ -1995,7 +1995,7 @@ static void dcn10_blank_pixel_data(
static void set_hdr_multiplier(struct pipe_ctx *pipe_ctx)
{
struct fixed31_32 multiplier = dal_fixed31_32_from_fraction(
struct fixed31_32 multiplier = dc_fixpt_from_fraction(
pipe_ctx->plane_state->sdr_white_level, 80);
uint32_t hw_mult = 0x1f000; // 1.0 default multiplier
struct custom_float_format fmt;

8
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
View File

@@ -603,11 +603,11 @@ void enc1_stream_encoder_set_mst_bandwidth(
struct fixed31_32 avg_time_slots_per_mtp)
{
struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
uint32_t x = dal_fixed31_32_floor(
uint32_t x = dc_fixpt_floor(
avg_time_slots_per_mtp);
uint32_t y = dal_fixed31_32_ceil(
dal_fixed31_32_shl(
dal_fixed31_32_sub_int(
uint32_t y = dc_fixpt_ceil(
dc_fixpt_shl(
dc_fixpt_sub_int(
avg_time_slots_per_mtp,
x),
26));

2
drivers/gpu/drm/amd/display/dc/irq_types.h
View File

@@ -26,6 +26,8 @@
#ifndef __DAL_IRQ_TYPES_H__
#define __DAL_IRQ_TYPES_H__
#include "os_types.h"
struct dc_context;
typedef void (*interrupt_handler)(void *);