Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...
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@@ -26,6 +26,9 @@
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static const struct zynqmp_eemi_ops *eemi_ops_tbl;
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static bool feature_check_enabled;
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static u32 zynqmp_pm_features[PM_API_MAX];
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static const struct mfd_cell firmware_devs[] = {
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{
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.name = "zynqmp_power_controller",
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@@ -44,6 +47,8 @@ static int zynqmp_pm_ret_code(u32 ret_status)
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case XST_PM_SUCCESS:
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case XST_PM_DOUBLE_REQ:
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return 0;
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case XST_PM_NO_FEATURE:
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return -ENOTSUPP;
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case XST_PM_NO_ACCESS:
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return -EACCES;
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case XST_PM_ABORT_SUSPEND:
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@@ -128,6 +133,39 @@ static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
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return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
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}
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/**
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* zynqmp_pm_feature() - Check weather given feature is supported or not
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* @api_id: API ID to check
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*
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* Return: Returns status, either success or error+reason
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*/
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static int zynqmp_pm_feature(u32 api_id)
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{
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int ret;
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u32 ret_payload[PAYLOAD_ARG_CNT];
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u64 smc_arg[2];
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if (!feature_check_enabled)
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return 0;
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/* Return value if feature is already checked */
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if (zynqmp_pm_features[api_id] != PM_FEATURE_UNCHECKED)
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return zynqmp_pm_features[api_id];
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smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
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smc_arg[1] = api_id;
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ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
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if (ret) {
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zynqmp_pm_features[api_id] = PM_FEATURE_INVALID;
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return PM_FEATURE_INVALID;
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}
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zynqmp_pm_features[api_id] = ret_payload[1];
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return zynqmp_pm_features[api_id];
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}
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/**
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* zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
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* caller function depending on the configuration
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@@ -162,6 +200,9 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
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*/
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u64 smc_arg[4];
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if (zynqmp_pm_feature(pm_api_id) == PM_FEATURE_INVALID)
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return -ENOTSUPP;
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smc_arg[0] = PM_SIP_SVC | pm_api_id;
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smc_arg[1] = ((u64)arg1 << 32) | arg0;
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smc_arg[2] = ((u64)arg3 << 32) | arg2;
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@@ -717,6 +758,8 @@ static int zynqmp_firmware_probe(struct platform_device *pdev)
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np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
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if (!np)
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return 0;
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feature_check_enabled = true;
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}
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of_node_put(np);
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