xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Revert "PCI/ERR: Cache RCEC EA Capability offset in pci_init_capabilities()"

Browse Source 
This reverts commit 1f5ea9e3ae which is
commit 90655631988f8f501529e6de5f13614389717ead upstream.

It breaks the Android kernel abi and can be brought back in the future
in an abi-safe way if it is really needed.

Bug: 161946584
Change-Id: I4faab84df428d32f281041094a26404304b6091f
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
Greg Kroah-Hartman
2024-05-21 16:11:47 +00:00
parent 60f9b585da
commit eaaff97d11
5 changed files with 1 additions and 83 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
drivers/pci/pci.h
View File

@@ -448,15 +448,6 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info);
void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
#endif /* CONFIG_PCIEAER */
#ifdef CONFIG_PCIEPORTBUS
/* Cached RCEC Endpoint Association */
struct rcec_ea {
u8 nextbusn;
u8 lastbusn;
u32 bitmap;
};
#endif
#ifdef CONFIG_PCIE_DPC
void pci_save_dpc_state(struct pci_dev *dev);
void pci_restore_dpc_state(struct pci_dev *dev);
@@ -471,14 +462,6 @@ static inline void pci_dpc_init(struct pci_dev *pdev) {}
static inline bool pci_dpc_recovered(struct pci_dev *pdev) { return false; }
#endif
#ifdef CONFIG_PCIEPORTBUS
void pci_rcec_init(struct pci_dev *dev);
void pci_rcec_exit(struct pci_dev *dev);
#else
static inline void pci_rcec_init(struct pci_dev *dev) {}
static inline void pci_rcec_exit(struct pci_dev *dev) {}
#endif
#ifdef CONFIG_PCI_ATS
/* Address Translation Service */
void pci_ats_init(struct pci_dev *dev);

2
drivers/pci/pcie/Makefile
View File

@@ -2,7 +2,7 @@
#
# Makefile for PCI Express features and port driver
pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o rcec.o
pcieportdrv-y := portdrv_core.o portdrv_pci.o err.o
obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o

59
drivers/pci/pcie/rcec.c
View File

@@ -1,59 +0,0 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Root Complex Event Collector Support
*
* Authors:
* Sean V Kelley <sean.v.kelley@intel.com>
* Qiuxu Zhuo <qiuxu.zhuo@intel.com>
*
* Copyright (C) 2020 Intel Corp.
*/
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/pci_regs.h>
#include "../pci.h"
void pci_rcec_init(struct pci_dev *dev)
{
struct rcec_ea *rcec_ea;
u32 rcec, hdr, busn;
u8 ver;
/* Only for Root Complex Event Collectors */
if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC)
return;
rcec = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_RCEC);
if (!rcec)
return;
rcec_ea = kzalloc(sizeof(*rcec_ea), GFP_KERNEL);
if (!rcec_ea)
return;
pci_read_config_dword(dev, rcec + PCI_RCEC_RCIEP_BITMAP,
&rcec_ea->bitmap);
/* Check whether RCEC BUSN register is present */
pci_read_config_dword(dev, rcec, &hdr);
ver = PCI_EXT_CAP_VER(hdr);
if (ver >= PCI_RCEC_BUSN_REG_VER) {
pci_read_config_dword(dev, rcec + PCI_RCEC_BUSN, &busn);
rcec_ea->nextbusn = PCI_RCEC_BUSN_NEXT(busn);
rcec_ea->lastbusn = PCI_RCEC_BUSN_LAST(busn);
} else {
/* Avoid later ver check by setting nextbusn */
rcec_ea->nextbusn = 0xff;
rcec_ea->lastbusn = 0x00;
}
dev->rcec_ea = rcec_ea;
}
void pci_rcec_exit(struct pci_dev *dev)
{
kfree(dev->rcec_ea);
dev->rcec_ea = NULL;
}

2
drivers/pci/probe.c
View File

@@ -2216,7 +2216,6 @@ static void pci_configure_device(struct pci_dev *dev)
static void pci_release_capabilities(struct pci_dev *dev)
{
pci_aer_exit(dev);
pci_rcec_exit(dev);
pci_vpd_release(dev);
pci_iov_release(dev);
pci_free_cap_save_buffers(dev);
@@ -2417,7 +2416,6 @@ static void pci_init_capabilities(struct pci_dev *dev)
pci_ptm_init(dev); /* Precision Time Measurement */
pci_aer_init(dev); /* Advanced Error Reporting */
pci_dpc_init(dev); /* Downstream Port Containment */
pci_rcec_init(dev); /* Root Complex Event Collector */
pcie_report_downtraining(dev);

4
include/linux/pci.h
View File

@@ -307,7 +307,6 @@ struct pcie_link_state;
struct pci_vpd;
struct pci_sriov;
struct pci_p2pdma;
struct rcec_ea;
/* The pci_dev structure describes PCI devices */
struct pci_dev {
@@ -330,9 +329,6 @@ struct pci_dev {
#ifdef CONFIG_PCIEAER
u16 aer_cap; /* AER capability offset */
struct aer_stats *aer_stats; /* AER stats for this device */
#endif
#ifdef CONFIG_PCIEPORTBUS
struct rcec_ea *rcec_ea; /* RCEC cached endpoint association */
#endif
u8 pcie_cap; /* PCIe capability offset */
u8 msi_cap; /* MSI capability offset */