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[ARM] 3064/1: start using ixp2000_reg_wrb

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Patch from Lennert Buytenhek

Switch the users of ixp2000_reg_write that depend on writes being
flushed out of the write buffer by the time that function returns
over to ixp2000_reg_wrb.

When using XCB=101, writes to the same functional unit are still
guaranteed to complete in order, so we only need to protect against:
- reordering of writes to different functional units
- masking an interrupt and then reenabling the IRQ bit in CPSR

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
2005-11-01 19:44:26 +00:00
committed by Russell King
parent 69a857610a
commit e9b72e43d9
5 changed files with 33 additions and 32 deletions
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6
arch/arm/mach-ixp2000/pci.c
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@@ -148,7 +148,7 @@ int ixp2000_pci_abort_handler(unsigned long addr, unsigned int fsr, struct pt_re
local_irq_save(flags);
temp = *(IXP2000_PCI_CONTROL);
if (temp & ((1 << 8) | (1 << 5))) {
ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
}
temp = *(IXP2000_PCI_CMDSTAT);
@@ -178,8 +178,8 @@ clear_master_aborts(void)
local_irq_save(flags);
temp = *(IXP2000_PCI_CONTROL);
if (temp & ((1 << 8) | (1 << 5))) {
ixp2000_reg_write(IXP2000_PCI_CONTROL, temp);
if (temp & ((1 << 8) | (1 << 5))) {
ixp2000_reg_wrb(IXP2000_PCI_CONTROL, temp);
}
temp = *(IXP2000_PCI_CMDSTAT);