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ARM: imx: enable anatop suspend/resume

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Anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.

As we have a common anatop file, remove all the operations
of anatop module in other files, use anatop interfaces to
do that.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Anson Huang
2013-03-20 19:39:42 -04:00
committed by Shawn Guo
parent cb872cacb2
commit e95dddb34c
6 changed files with 94 additions and 44 deletions
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48
arch/arm/mach-imx/mach-imx6q.c
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@@ -1,5 +1,5 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011-2013 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
@@ -39,27 +39,12 @@
#include "cpuidle.h"
#include "hardware.h"
#define IMX6Q_ANALOG_DIGPROG 0x260
static int imx6q_revision(void)
{
struct device_node *np;
void __iomem *base;
static u32 rev;
if (!rev) {
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
if (!np)
return IMX_CHIP_REVISION_UNKNOWN;
base = of_iomap(np, 0);
if (!base) {
of_node_put(np);
return IMX_CHIP_REVISION_UNKNOWN;
}
rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
iounmap(base);
of_node_put(np);
}
if (!rev)
rev = imx_anatop_get_digprog();
switch (rev & 0xff) {
case 0:
@@ -165,29 +150,7 @@ static void __init imx6q_1588_init(void)
}
static void __init imx6q_usb_init(void)
{
struct regmap *anatop;
#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
if (!IS_ERR(anatop)) {
/*
* The external charger detector needs to be disabled,
* or the signal at DP will be poor
*/
regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
BM_ANADIG_USB_CHRG_DETECT_EN_B
| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
BM_ANADIG_USB_CHRG_DETECT_EN_B |
BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
} else {
pr_warn("failed to find fsl,imx6q-anatop regmap\n");
}
imx_anatop_usb_chrg_detect_disable();
}
static void __init imx6q_init_machine(void)
@@ -197,9 +160,11 @@ static void __init imx6q_init_machine(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
imx_anatop_init();
imx6q_pm_init();
imx6q_usb_init();
imx6q_1588_init();
imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
#define OCOTP_CFG3 0x440
@@ -293,7 +258,6 @@ static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
twd_local_timer_of_register();
imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {