e1000e: cosmetic cleanup of comments
Update comments to conform to the preferred style for networking code as described in ./Documentation/CodingStyle and checked for in the recently added checkpatch NETWORKING_BLOCK_COMMENT_STYLE test. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Jeff Kirsher

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daf56e406a
commit
e921eb1ac4
@@ -161,8 +161,7 @@ struct e1000_info;
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/* Time to wait before putting the device into D3 if there's no link (in ms). */
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#define LINK_TIMEOUT 100
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/*
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* Count for polling __E1000_RESET condition every 10-20msec.
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/* Count for polling __E1000_RESET condition every 10-20msec.
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* Experimentation has shown the reset can take approximately 210msec.
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*/
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#define E1000_CHECK_RESET_COUNT 25
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@@ -172,8 +171,7 @@ struct e1000_info;
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#define BURST_RDTR 0x20
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#define BURST_RADV 0x20
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/*
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* in the case of WTHRESH, it appears at least the 82571/2 hardware
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/* in the case of WTHRESH, it appears at least the 82571/2 hardware
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* writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
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* WTHRESH=4, so a setting of 5 gives the most efficient bus
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* utilization but to avoid possible Tx stalls, set it to 1
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@@ -214,8 +212,7 @@ struct e1000_ps_page {
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u64 dma; /* must be u64 - written to hw */
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};
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/*
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* wrappers around a pointer to a socket buffer,
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/* wrappers around a pointer to a socket buffer,
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* so a DMA handle can be stored along with the buffer
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*/
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struct e1000_buffer {
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@@ -305,9 +302,7 @@ struct e1000_adapter {
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u16 tx_itr;
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u16 rx_itr;
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/*
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* Tx
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*/
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/* Tx */
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struct e1000_ring *tx_ring /* One per active queue */
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____cacheline_aligned_in_smp;
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u32 tx_fifo_limit;
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@@ -340,9 +335,7 @@ struct e1000_adapter {
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u32 tx_fifo_size;
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u32 tx_dma_failed;
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/*
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* Rx
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*/
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/* Rx */
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bool (*clean_rx) (struct e1000_ring *ring, int *work_done,
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int work_to_do) ____cacheline_aligned_in_smp;
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void (*alloc_rx_buf) (struct e1000_ring *ring, int cleaned_count,
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