arm64: dts: qcom: sdm845-db845c: correct SPI2 pins drive strength
commit 9905370560d9c29adc15f4937c5a0c0dac05f0b4 upstream.
The pin configuration (done with generic pin controller helpers and
as expressed by bindings) requires children nodes with either:
1. "pins" property and the actual configuration,
2. another set of nodes with above point.
The qup_spi2_default pin configuration uses alreaady the second method
with a "pinmux" child, so configure drive-strength similarly in
"pinconf". Otherwise the PIN drive strength would not be applied.
Fixes: 8d23a00404
("arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221010114417.29859-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
c023597bae
commit
e918762f8a
@@ -1045,7 +1045,10 @@
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/* PINCTRL - additions to nodes defined in sdm845.dtsi */
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/* PINCTRL - additions to nodes defined in sdm845.dtsi */
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&qup_spi2_default {
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&qup_spi2_default {
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pinconf {
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pins = "gpio27", "gpio28", "gpio29", "gpio30";
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drive-strength = <16>;
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drive-strength = <16>;
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};
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};
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};
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&qup_uart3_default{
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&qup_uart3_default{
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