Merge tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM/arm64 Devicetree updates from Olof Johansson: "As usual, device tree updates is the bulk of our material in this merge window. This time around, 559 patches affecting both 32- and 64-bit platforms. Changes are too many to list individually, but some of the larger ones: New platform/SoC support: - Automotive: + Renesas R-Car D3 (R8A77995) + TI DT76x + MediaTek mt2712e - Communication-oriented: + Qualcomm IPQ8074 + Broadcom Stingray + Marvell Armada 8080 - Set top box: + Uniphier PXs3 Besides some vendor reference boards for the SoC above, there are also several new boards/machines: - TI AM335x Moxa UC-8100-ME-T open platform - TI AM57xx Beaglebone X15 Rev C - Microchip/Atmel sama5d27 SoM1 EK - Broadcom Raspberry Pi Zero W - Gemini-based D-Link DIR-685 router - Freescale i.MX6: + Toradex Apalis module + Apalis and Ixora carrier boards + Engicam GEAM6UL Starter Kit - Freescale i.MX53-based Beckhoff CX9020 Embedded PC - Mediatek mt7623-based BananaPi R2 - Several Allwinner-based single-board computers: + Cubietruck plus + Bananapi M3, M2M and M64 + NanoPi A64 + A64-OLinuXino + Pine64 - Rockchip RK3328 Pine64/Rock64 board support - Rockchip RK3399 boards: + RK3399 Sapphire module on Excavator carrier (RK3399 reference design) + Theobroma Systems RK3399-Q7 SoM - ZTE ZX296718 PCBOX Board" * tag 'armsoc-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (559 commits) ARM: dts: at91: at91sam9g45: add AC97 arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 arm64: dts: uniphier: add PXs3 SoC support ARM: dts: uniphier: add pinctrl groups of ethernet phy mode ARM: dts: uniphier: fix size of sdctrl nodes ARM: dts: uniphier: add AIDET nodes arm64: dts: uniphier: fix size of sdctrl node arm64: dts: uniphier: add AIDET nodes Revert "ARM: dts: sun8i: h3: Enable dwmac-sun8i on the Beelink X2" arm64: dts: uniphier: add reset controller node of analog amplifier arm64: dts: marvell: add Device Tree files for Armada-8KP arm64: dts: rockchip: add Haikou baseboard with RK3399-Q7 SoM arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM dt-bindings: add rk3399-q7 SoM ARM: dts: rockchip: enable usb for rv1108-evb ARM: dts: rockchip: add usb nodes for rv1108 SoCs dt-bindings: update grf-binding for rv1108 SoCs ARM: dts: aspeed-g4: fix AHB window size of the SMC controllers ...
这个提交包含在:
@@ -1,6 +1,18 @@
|
||||
Amlogic MesonX device tree bindings
|
||||
-------------------------------------------
|
||||
|
||||
Work in progress statement:
|
||||
|
||||
Device tree files and bindings applying to Amlogic SoCs and boards are
|
||||
considered "unstable". Any Amlogic device tree binding may change at
|
||||
any time. Be sure to use a device tree binary and a kernel image
|
||||
generated from the same source tree.
|
||||
|
||||
Please refer to Documentation/devicetree/bindings/ABI.txt for a definition of a
|
||||
stable binding/ABI.
|
||||
|
||||
---------------------------------------------------------------
|
||||
|
||||
Boards with the Amlogic Meson6 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible: "amlogic,meson6"
|
||||
|
@@ -42,6 +42,10 @@ Raspberry Pi Zero
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-zero", "brcm,bcm2835";
|
||||
|
||||
Raspberry Pi Zero W
|
||||
Required root node properties:
|
||||
compatible = "raspberrypi,model-zero-w", "brcm,bcm2835";
|
||||
|
||||
Generic BCM2835 board
|
||||
Required root node properties:
|
||||
compatible = "brcm,bcm2835";
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||||
|
@@ -0,0 +1,6 @@
|
||||
Beckhoff Automation Platforms Device Tree Bindings
|
||||
--------------------------------------------------
|
||||
|
||||
CX9020 Embedded PC
|
||||
Required root node properties:
|
||||
- compatible = "bhf,cx9020", "fsl,imx53";
|
@@ -200,6 +200,7 @@ described below.
|
||||
"arm,realview-smp"
|
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"brcm,bcm11351-cpu-method"
|
||||
"brcm,bcm23550"
|
||||
"brcm,bcm2836-smp"
|
||||
"brcm,bcm-nsp-smp"
|
||||
"brcm,brahma-b15"
|
||||
"marvell,armada-375-smp"
|
||||
|
@@ -0,0 +1,15 @@
|
||||
Marvell Armada 8KPlus Platforms Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
|
||||
Boards using a SoC of the Marvell Armada 8KP families must carry
|
||||
the following root node property:
|
||||
|
||||
- compatible, with one of the following values:
|
||||
|
||||
- "marvell,armada-8080", "marvell,armada-ap810-octa", "marvell,armada-ap810"
|
||||
when the SoC being used is the Armada 8080
|
||||
|
||||
Example:
|
||||
|
||||
compatible = "marvell,armada-8080-db", "marvell,armada-8080",
|
||||
"marvell,armada-ap810-octa", "marvell,armada-ap810"
|
@@ -1,12 +1,12 @@
|
||||
MediaTek mt65xx, mt67xx & mt81xx Platforms Device Tree Bindings
|
||||
MediaTek SoC based Platforms Device Tree Bindings
|
||||
|
||||
Boards with a MediaTek mt65xx/mt67xx/mt81xx SoC shall have the
|
||||
following property:
|
||||
Boards with a MediaTek SoC shall have the following property:
|
||||
|
||||
Required root node property:
|
||||
|
||||
compatible: Must contain one of
|
||||
"mediatek,mt2701"
|
||||
"mediatek,mt2712"
|
||||
"mediatek,mt6580"
|
||||
"mediatek,mt6589"
|
||||
"mediatek,mt6592"
|
||||
@@ -14,7 +14,8 @@ compatible: Must contain one of
|
||||
"mediatek,mt6795"
|
||||
"mediatek,mt6797"
|
||||
"mediatek,mt7622"
|
||||
"mediatek,mt7623"
|
||||
"mediatek,mt7623" which is referred to MT7623N SoC
|
||||
"mediatek,mt7623a"
|
||||
"mediatek,mt8127"
|
||||
"mediatek,mt8135"
|
||||
"mediatek,mt8173"
|
||||
@@ -25,6 +26,9 @@ Supported boards:
|
||||
- Evaluation board for MT2701:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt2701-evb", "mediatek,mt2701";
|
||||
- Evaluation board for MT2712:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
|
||||
- Evaluation board for MT6580:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt6580-evbp1", "mediatek,mt6580";
|
||||
@@ -46,9 +50,11 @@ Supported boards:
|
||||
- Reference board variant 1 for MT7622:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
|
||||
- Evaluation board for MT7623:
|
||||
- Reference board for MT7623n with NAND:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt7623-evb", "mediatek,mt7623";
|
||||
- compatible = "mediatek,mt7623n-rfb-nand", "mediatek,mt7623";
|
||||
- Bananapi BPI-R2 board:
|
||||
- compatible = "bananapi,bpi-r2", "mediatek,mt7623";
|
||||
- MTK mt8127 tablet moose EVB:
|
||||
Required root node properties:
|
||||
- compatible = "mediatek,mt8127-moose", "mediatek,mt8127";
|
||||
|
@@ -157,6 +157,9 @@ Boards:
|
||||
- AM335X phyCORE-AM335x: Development kit
|
||||
compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx"
|
||||
|
||||
- AM335X UC-8100-ME-T: Communication-centric industrial computing platform
|
||||
compatible = "moxa,uc-8100-me-t", "ti,am33xx";
|
||||
|
||||
- OMAP5 EVM : Evaluation Module
|
||||
compatible = "ti,omap5-evm", "ti,omap5"
|
||||
|
||||
@@ -187,6 +190,9 @@ Boards:
|
||||
- AM5718 IDK
|
||||
compatible = "ti,am5718-idk", "ti,am5718", "ti,dra7"
|
||||
|
||||
- DRA762 EVM: Software Development Board for DRA762
|
||||
compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7"
|
||||
|
||||
- DRA742 EVM: Software Development Board for DRA742
|
||||
compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"
|
||||
|
||||
|
@@ -25,6 +25,7 @@ The 'SoC' element must be one of the following strings:
|
||||
msm8994
|
||||
msm8996
|
||||
mdm9615
|
||||
ipq8074
|
||||
|
||||
The 'board' element must be one of the following strings:
|
||||
|
||||
@@ -33,6 +34,7 @@ The 'board' element must be one of the following strings:
|
||||
dragonboard
|
||||
mtp
|
||||
sbc
|
||||
hk01
|
||||
|
||||
The 'soc_version' and 'board_version' elements take the form of v<Major>.<Minor>
|
||||
where the minor number may be omitted when it's zero, i.e. v1.0 is the same
|
||||
|
@@ -134,6 +134,10 @@ Rockchip platforms device tree bindings
|
||||
Required root node properties:
|
||||
- compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
|
||||
|
||||
- Pine64 Rock64 board:
|
||||
Required root node properties:
|
||||
- compatible = "pine64,rock64", "rockchip,rk3328";
|
||||
|
||||
- Rockchip PX3 Evaluation board:
|
||||
Required root node properties:
|
||||
- compatible = "rockchip,px3-evb", "rockchip,px3", "rockchip,rk3188";
|
||||
@@ -173,6 +177,14 @@ Rockchip platforms device tree bindings
|
||||
Required root node properties:
|
||||
- compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
|
||||
|
||||
- Rockchip RK3399 Sapphire Excavator board:
|
||||
Required root node properties:
|
||||
- compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
|
||||
|
||||
- Theobroma Systems RK3399-Q7 Haikou Baseboard:
|
||||
Required root node properties:
|
||||
- compatible = "tsd,rk3399-q7-haikou", "rockchip,rk3399";
|
||||
|
||||
- Tronsmart Orion R68 Meta
|
||||
Required root node properties:
|
||||
- compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368";
|
||||
|
@@ -39,6 +39,8 @@ SoCs:
|
||||
compatible = "renesas,r8a7795"
|
||||
- R-Car M3-W (R8A77960)
|
||||
compatible = "renesas,r8a7796"
|
||||
- R-Car D3 (R8A77995)
|
||||
compatible = "renesas,r8a77995"
|
||||
|
||||
|
||||
Boards:
|
||||
@@ -53,6 +55,8 @@ Boards:
|
||||
compatible = "renesas,blanche", "renesas,r8a7792"
|
||||
- BOCK-W
|
||||
compatible = "renesas,bockw", "renesas,r8a7778"
|
||||
- Draak (RTP0RC77995SEB0010S)
|
||||
compatible = "renesas,draak", "renesas,r8a77995"
|
||||
- Genmai (RTK772100BC00000BR)
|
||||
compatible = "renesas,genmai", "renesas,r7s72100"
|
||||
- GR-Peach (X28A-M01-E/F)
|
||||
@@ -64,6 +68,10 @@ Boards:
|
||||
compatible = "renesas,h3ulcb", "renesas,r8a7795";
|
||||
- Henninger
|
||||
compatible = "renesas,henninger", "renesas,r8a7791"
|
||||
- iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
|
||||
compatible = "iwave,g22d", "iwave,g22m", "renesas,r8a7745"
|
||||
- iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM)
|
||||
compatible = "iwave,g22m", "renesas,r8a7745"
|
||||
- iWave Systems RZ/G1M Qseven Development Platform (iW-RainboW-G20D-Qseven)
|
||||
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
|
||||
- iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
|
||||
|
@@ -16,18 +16,25 @@ Required Properties:
|
||||
mapped region.
|
||||
|
||||
- #clock-cells: should be 1.
|
||||
- #reset-cells: should be 1.
|
||||
|
||||
Each clock is assigned an identifier and client nodes can use this identifier
|
||||
to specify the clock which they consume. All available clocks are defined as
|
||||
preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be
|
||||
used in device tree sources.
|
||||
|
||||
Similarly a preprocessor macro for each reset line is defined in
|
||||
dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the
|
||||
device tree sources).
|
||||
|
||||
|
||||
Example: Clock controller node:
|
||||
|
||||
clkc: clock-controller@c1104000 {
|
||||
#clock-cells = <1>;
|
||||
compatible = "amlogic,meson8b-clkc";
|
||||
reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
|
@@ -13,6 +13,7 @@ Required properties:
|
||||
|
||||
- compatible : Shall contain one or more of
|
||||
- "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
|
||||
- "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
|
||||
- "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 compatible HDMI TX
|
||||
|
||||
When compatible with generic versions, nodes must list the SoC-specific
|
||||
|
@@ -36,8 +36,10 @@ Required Properties:
|
||||
When supplied they must be named "dclkin.x" with "x" being the input
|
||||
clock numerical index.
|
||||
|
||||
- vsps: A list of phandles to the VSP nodes that handle the memory
|
||||
interfaces for the DU channels.
|
||||
- vsps: A list of phandle and channel index tuples to the VSPs that handle
|
||||
the memory interfaces for the DU channels. The phandle identifies the VSP
|
||||
instance that serves the DU channel, and the channel index identifies the
|
||||
LIF instance in that VSP.
|
||||
|
||||
Required nodes:
|
||||
|
||||
@@ -59,24 +61,24 @@ corresponding to each DU output.
|
||||
R8A7796 (M3-W) DPAD HDMI LVDS -
|
||||
|
||||
|
||||
Example: R8A7790 (R-Car H2) DU
|
||||
Example: R8A7795 (R-Car H3) ES2.0 DU
|
||||
|
||||
du: du@feb00000 {
|
||||
compatible = "renesas,du-r8a7790";
|
||||
reg = <0 0xfeb00000 0 0x70000>,
|
||||
<0 0xfeb90000 0 0x1c>,
|
||||
<0 0xfeb94000 0 0x1c>;
|
||||
reg-names = "du", "lvds.0", "lvds.1";
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<0 269 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&mstp7_clks R8A7790_CLK_DU0>,
|
||||
<&mstp7_clks R8A7790_CLK_DU1>,
|
||||
<&mstp7_clks R8A7790_CLK_DU2>,
|
||||
<&mstp7_clks R8A7790_CLK_LVDS0>,
|
||||
<&mstp7_clks R8A7790_CLK_LVDS1>;
|
||||
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7795";
|
||||
reg = <0 0xfeb00000 0 0x80000>,
|
||||
<0 0xfeb90000 0 0x14>;
|
||||
reg-names = "du", "lvds.0";
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>,
|
||||
<&cpg CPG_MOD 721>,
|
||||
<&cpg CPG_MOD 727>;
|
||||
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
|
||||
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
@@ -89,12 +91,19 @@ Example: R8A7790 (R-Car H2) DU
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
du_out_lvds0: endpoint {
|
||||
du_out_hdmi0: endpoint {
|
||||
remote-endpoint = <&dw_hdmi0_in>;
|
||||
};
|
||||
};
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
du_out_lvds1: endpoint {
|
||||
du_out_hdmi1: endpoint {
|
||||
remote-endpoint = <&dw_hdmi1_in>;
|
||||
};
|
||||
};
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
du_out_lvds0: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
@@ -9,7 +9,12 @@ execute the actual DMA tansfer.
|
||||
eDMA3 Channel Controller
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,edma3-tpcc" for the channel controller(s)
|
||||
--------------------
|
||||
- compatible: Should be:
|
||||
- "ti,edma3-tpcc" for the channel controller(s) on OMAP,
|
||||
AM33xx and AM43xx SoCs.
|
||||
- "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
|
||||
channel controller(s) on 66AK2G.
|
||||
- #dma-cells: Should be set to <2>. The first number is the DMA request
|
||||
number and the second is the TC the channel is serviced on.
|
||||
- reg: Memory map of eDMA CC
|
||||
@@ -19,8 +24,19 @@ Required properties:
|
||||
- ti,tptcs: List of TPTCs associated with the eDMA in the following form:
|
||||
<&tptc_phandle TC_priority_number>. The highest priority is 0.
|
||||
|
||||
SoC-specific Required properties:
|
||||
--------------------------------
|
||||
The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
|
||||
- ti,hwmods: Name of the hwmods associated to the eDMA CC.
|
||||
|
||||
The following are mandatory properties for 66AK2G SoCs only:
|
||||
- power-domains:Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
|
||||
Optional properties:
|
||||
- ti,hwmods: Name of the hwmods associated to the eDMA CC
|
||||
-------------------
|
||||
- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
|
||||
these channels will be SW triggered channels. See example.
|
||||
- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
|
||||
@@ -31,17 +47,34 @@ Optional properties:
|
||||
eDMA3 Transfer Controller
|
||||
|
||||
Required properties:
|
||||
- compatible: "ti,edma3-tptc" for the transfer controller(s)
|
||||
--------------------
|
||||
- compatible: Should be:
|
||||
- "ti,edma3-tptc" for the transfer controller(s) on OMAP,
|
||||
AM33xx and AM43xx SoCs.
|
||||
- "ti,k2g-edma3-tptc", "ti,edma3-tptc" for the
|
||||
transfer controller(s) on 66AK2G.
|
||||
- reg: Memory map of eDMA TC
|
||||
- interrupts: Interrupt number for TCerrint.
|
||||
|
||||
SoC-specific Required properties:
|
||||
--------------------------------
|
||||
The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
|
||||
- ti,hwmods: Name of the hwmods associated to the eDMA TC.
|
||||
|
||||
The following are mandatory properties for 66AK2G SoCs only:
|
||||
- power-domains:Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
|
||||
Optional properties:
|
||||
- ti,hwmods: Name of the hwmods associated to the given eDMA TC
|
||||
-------------------
|
||||
- interrupt-names: "edma3_tcerrint"
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
Example:
|
||||
Examples:
|
||||
|
||||
1.
|
||||
edma: edma@49000000 {
|
||||
compatible = "ti,edma3-tpcc";
|
||||
ti,hwmods = "tpcc";
|
||||
@@ -108,6 +141,58 @@ mcasp0: mcasp@48038000 {
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
2.
|
||||
edma1: edma@02728000 {
|
||||
compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
|
||||
reg = <0x02728000 0x8000>;
|
||||
reg-names = "edma3_cc";
|
||||
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
|
||||
<GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
|
||||
interrupt-names = "edma3_ccint", "emda3_mperr",
|
||||
"edma3_ccerrint";
|
||||
dma-requests = <64>;
|
||||
#dma-cells = <2>;
|
||||
|
||||
ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
|
||||
|
||||
/*
|
||||
* memcpy is disabled, can be enabled with:
|
||||
* ti,edma-memcpy-channels = <12 13 14 15>;
|
||||
* for example.
|
||||
*/
|
||||
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
edma1_tptc0: tptc@027b0000 {
|
||||
compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x027b0000 0x400>;
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
edma1_tptc1: tptc@027b8000 {
|
||||
compatible = "ti, k2g-edma3-tptc", "ti,edma3-tptc";
|
||||
reg = <0x027b8000 0x400>;
|
||||
power-domains = <&k2g_pds 0x4f>;
|
||||
};
|
||||
|
||||
mmc0: mmc@23000000 {
|
||||
compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
|
||||
reg = <0x23000000 0x400>;
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
|
||||
dmas = <&edma1 24 0>, <&edma1 25 0>;
|
||||
dma-names = "tx", "rx";
|
||||
bus-width = <4>;
|
||||
ti,needs-special-reset;
|
||||
no-1-8-v;
|
||||
max-frequency = <96000000>;
|
||||
power-domains = <&k2g_pds 0xb>;
|
||||
clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
|
||||
clock-names = "fck", "mmchsdb_fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
------------------------------------------------------------------------------
|
||||
DEPRECATED binding, new DTS files must use the ti,edma3-tpcc/ti,edma3-tptc
|
||||
binding.
|
||||
|
@@ -17,6 +17,7 @@ Required properties:
|
||||
* which must be preceded by one of the following vendor specifics:
|
||||
+ "amlogic,meson-gxm-mali"
|
||||
+ "rockchip,rk3288-mali"
|
||||
+ "rockchip,rk3399-mali"
|
||||
|
||||
- reg : Physical base address of the device and length of the register area.
|
||||
|
||||
|
@@ -17,6 +17,7 @@ Required properties:
|
||||
"mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582
|
||||
"mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580
|
||||
"mediatek,mt6577-sysirq": for MT6577
|
||||
"mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712
|
||||
"mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
|
||||
|
@@ -1,33 +1,55 @@
|
||||
* TI Highspeed MMC host controller for OMAP
|
||||
* TI Highspeed MMC host controller for OMAP and 66AK2G family.
|
||||
|
||||
The Highspeed MMC Host Controller on TI OMAP family
|
||||
The Highspeed MMC Host Controller on TI OMAP and 66AK2G family
|
||||
provides an interface for MMC, SD, and SDIO types of memory cards.
|
||||
|
||||
This file documents differences between the core properties described
|
||||
by mmc.txt and the properties used by the omap_hsmmc driver.
|
||||
|
||||
Required properties:
|
||||
--------------------
|
||||
- compatible:
|
||||
Should be "ti,omap2-hsmmc", for OMAP2 controllers
|
||||
Should be "ti,omap3-hsmmc", for OMAP3 controllers
|
||||
Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0
|
||||
Should be "ti,omap4-hsmmc", for OMAP4 controllers
|
||||
Should be "ti,am33xx-hsmmc", for AM335x controllers
|
||||
- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1
|
||||
Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers.
|
||||
|
||||
SoC specific required properties:
|
||||
---------------------------------
|
||||
The following are mandatory properties for OMAPs, AM33xx and AM43xx SoCs only:
|
||||
- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1.
|
||||
|
||||
The following are mandatory properties for 66AK2G SoCs only:
|
||||
- power-domains:Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the MMC device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
- clocks: Must contain an entry for each entry in clock-names. Should
|
||||
be defined as per the he appropriate clock bindings consumer
|
||||
usage in Documentation/devicetree/bindings/clock/ti,sci-clk.txt
|
||||
- clock-names: Shall be "fck" for the functional clock,
|
||||
and "mmchsdb_fck" for the debounce clock.
|
||||
|
||||
|
||||
Optional properties:
|
||||
ti,dual-volt: boolean, supports dual voltage cards
|
||||
<supply-name>-supply: phandle to the regulator device tree node
|
||||
"supply-name" examples are "vmmc", "vmmc_aux"(deprecated)/"vqmmc" etc
|
||||
ti,non-removable: non-removable slot (like eMMC)
|
||||
ti,needs-special-reset: Requires a special softreset sequence
|
||||
ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
|
||||
dmas: List of DMA specifiers with the controller specific format
|
||||
as described in the generic DMA client binding. A tx and rx
|
||||
specifier is required.
|
||||
dma-names: List of DMA request names. These strings correspond
|
||||
1:1 with the DMA specifiers listed in dmas. The string naming is
|
||||
to be "rx" and "tx" for RX and TX DMA requests, respectively.
|
||||
--------------------
|
||||
- ti,dual-volt: boolean, supports dual voltage cards
|
||||
- <supply-name>-supply: phandle to the regulator device tree node
|
||||
"supply-name" examples are "vmmc",
|
||||
"vmmc_aux"(deprecated)/"vqmmc" etc
|
||||
- ti,non-removable: non-removable slot (like eMMC)
|
||||
- ti,needs-special-reset: Requires a special softreset sequence
|
||||
- ti,needs-special-hs-handling: HSMMC IP needs special setting
|
||||
for handling High Speed
|
||||
- dmas: List of DMA specifiers with the controller specific
|
||||
format as described in the generic DMA client
|
||||
binding. A tx and rx specifier is required.
|
||||
- dma-names: List of DMA request names. These strings correspond
|
||||
1:1 with the DMA specifiers listed in dmas.
|
||||
The string naming is to be "rx" and "tx" for
|
||||
RX and TX DMA requests, respectively.
|
||||
|
||||
Examples:
|
||||
|
||||
|
@@ -11,9 +11,20 @@ Required properties:
|
||||
- interrupts : property with a value describing the interrupt
|
||||
number
|
||||
|
||||
Optional properties:
|
||||
The following are mandatory properties for DRA7x, AM33xx and AM43xx SoCs only:
|
||||
- ti,hwmods : Must be "d_can<n>" or "c_can<n>", n being the
|
||||
instance number
|
||||
|
||||
The following are mandatory properties for Keystone 2 66AK2G SoCs only:
|
||||
- power-domains : Should contain a phandle to a PM domain provider node
|
||||
and an args specifier containing the DCAN device id
|
||||
value. This property is as per the binding,
|
||||
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
|
||||
- clocks : CAN functional clock phandle. This property is as per the
|
||||
binding,
|
||||
Documentation/devicetree/bindings/clock/ti,sci-clk.txt
|
||||
|
||||
Optional properties:
|
||||
- syscon-raminit : Handle to system control region that contains the
|
||||
RAMINIT register, register offset to the RAMINIT
|
||||
register and the CAN instance number (0 offset).
|
||||
|
@@ -20,8 +20,10 @@ Required properties:
|
||||
"ethif", "esw", "gp0", "gp1", "gp2", "sgmii_tx250m", "sgmii_rx250m",
|
||||
"sgmii_cdr_ref", "sgmii_cdr_fb", "sgmii_ck", "eth2pll" : For MT7622 SoC
|
||||
- power-domains: phandle to the power domain that the ethernet is part of
|
||||
- resets: Should contain a phandle to the ethsys reset signal
|
||||
- reset-names: Should contain the reset signal name "eth"
|
||||
- resets: Should contain phandles to the ethsys reset signals
|
||||
- reset-names: Should contain the names of reset signal listed in the resets
|
||||
property
|
||||
These are "fe", "gmac" and "ppe"
|
||||
- mediatek,ethsys: phandle to the syscon node that handles the port setup
|
||||
- mediatek,sgmiisys: phandle to the syscon node that handles the SGMII setup
|
||||
which is required for those SoCs equipped with SGMII such as MT7622 SoC.
|
||||
|
@@ -276,7 +276,7 @@ pcie-controller {
|
||||
clocks = <&gateclk 26>;
|
||||
};
|
||||
|
||||
pcie@10,0 {
|
||||
pcie@a,0 {
|
||||
device_type = "pci";
|
||||
assigned-addresses = <0x82005000 0 0x82000 0 0x2000>;
|
||||
reg = <0x5000 0 0 0 0>;
|
||||
|
@@ -1,12 +1,13 @@
|
||||
DT bindings for the Renesas Advanced Power Management Unit
|
||||
|
||||
Renesas R-Car line of SoCs utilize one or more APMU hardware units
|
||||
Renesas R-Car and RZ/G1 SoCs utilize one or more APMU hardware units
|
||||
for CPU core power domain control including SMP boot and CPU Hotplug.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
|
||||
Examples with soctypes are:
|
||||
- "renesas,r8a7743-apmu" (RZ/G1M)
|
||||
- "renesas,r8a7790-apmu" (R-Car H2)
|
||||
- "renesas,r8a7791-apmu" (R-Car M2-W)
|
||||
- "renesas,r8a7792-apmu" (R-Car V2H)
|
||||
|
@@ -3,6 +3,7 @@
|
||||
Required properties:
|
||||
- compatible should contain:
|
||||
* "mediatek,mt2701-uart" for MT2701 compatible UARTS
|
||||
* "mediatek,mt2712-uart" for MT2712 compatible UARTS
|
||||
* "mediatek,mt6580-uart" for MT6580 compatible UARTS
|
||||
* "mediatek,mt6582-uart" for MT6582 compatible UARTS
|
||||
* "mediatek,mt6589-uart" for MT6589 compatible UARTS
|
||||
|
@@ -21,6 +21,7 @@ Required Properties:
|
||||
- "rockchip,rk3328-grf", "syscon": for rk3328
|
||||
- "rockchip,rk3368-grf", "syscon": for rk3368
|
||||
- "rockchip,rk3399-grf", "syscon": for rk3399
|
||||
- "rockchip,rv1108-grf", "syscon": for rv1108
|
||||
- compatible: PMUGRF should be one of the following:
|
||||
- "rockchip,rk3368-pmugrf", "syscon": for rk3368
|
||||
- "rockchip,rk3399-pmugrf", "syscon": for rk3399
|
||||
@@ -28,6 +29,8 @@ Required Properties:
|
||||
- "rockchip,rk3288-sgrf", "syscon": for rk3288
|
||||
- compatible: USB2PHYGRF should be one of the followings
|
||||
- "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328
|
||||
- compatible: USBGRF should be one of the following
|
||||
- "rockchip,rv1108-usbgrf", "syscon": for rv1108
|
||||
- reg: physical base address of the controller and length of memory mapped
|
||||
region.
|
||||
|
||||
|
@@ -46,12 +46,13 @@ Required Properties:
|
||||
- power-domains: phandle pointing to the corresponding PM domain node
|
||||
and an ID representing the device.
|
||||
|
||||
See dt-bindings/genpd/k2g.h for the list of valid identifiers for k2g.
|
||||
See http://processors.wiki.ti.com/index.php/TISCI#66AK2G02_Data for the list
|
||||
of valid identifiers for k2g.
|
||||
|
||||
Example (K2G):
|
||||
--------------------
|
||||
uart0: serial@02530c00 {
|
||||
compatible = "ns16550a";
|
||||
...
|
||||
power-domains = <&k2g_pds K2G_DEV_UART0>;
|
||||
power-domains = <&k2g_pds 0x002c>;
|
||||
};
|
||||
|
@@ -0,0 +1,27 @@
|
||||
* Renesas SMP SRAM
|
||||
|
||||
Renesas R-Car Gen2 and RZ/G1 SoCs need a small piece of SRAM for the jump stub
|
||||
for secondary CPU bringup and CPU hotplug.
|
||||
This memory is reserved by adding a child node to a "mmio-sram" node, cfr.
|
||||
Documentation/devicetree/bindings/sram/sram.txt.
|
||||
|
||||
Required child node properties:
|
||||
- compatible: Must be "renesas,smp-sram",
|
||||
- reg: Address and length of the reserved SRAM.
|
||||
The full physical (bus) address must be aligned to a 256 KiB boundary.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
icram1: sram@e63c0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0 0xe63c0000 0 0x1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0xe63c0000 0x1000>;
|
||||
|
||||
smp-sram@0 {
|
||||
compatible = "renesas,smp-sram";
|
||||
reg = <0 0x10>;
|
||||
};
|
||||
};
|
@@ -48,6 +48,7 @@ avic Shanghai AVIC Optoelectronics Co., Ltd.
|
||||
axentia Axentia Technologies AB
|
||||
axis Axis Communications AB
|
||||
bananapi BIPAI KEJI LIMITED
|
||||
bhf Beckhoff Automation GmbH & Co. KG
|
||||
boe BOE Technology Group Co., Ltd.
|
||||
bosch Bosch Sensortec GmbH
|
||||
boundary Boundary Devices Inc.
|
||||
|
@@ -3,9 +3,9 @@ Mediatek SoCs Watchdog timer
|
||||
Required properties:
|
||||
|
||||
- compatible should contain:
|
||||
* "mediatek,mt2701-wdt" for MT2701 compatible watchdog timers
|
||||
* "mediatek,mt6589-wdt" for all compatible watchdog timers (MT2701,
|
||||
MT6589)
|
||||
"mediatek,mt2701-wdt", "mediatek,mt6589-wdt": for MT2701
|
||||
"mediatek,mt6589-wdt": for MT6589
|
||||
"mediatek,mt6797-wdt", "mediatek,mt6589-wdt": for MT6797
|
||||
|
||||
- reg : Specifies base physical address and size of the registers.
|
||||
|
||||
|
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