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drm/radeon/kms/r6xx+: add query for tile config (v2)

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Userspace needs this information to access tiled
buffers via the CPU.

v2: rebased on evergreen accel changes

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alex Deucher
2010-06-04 13:10:12 -04:00
committed by Dave Airlie
parent 40e2a5c15d
commit e7aeeba6a8
7 changed files with 22 additions and 3 deletions
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2
drivers/gpu/drm/radeon/r600.c
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@@ -1623,7 +1623,7 @@ void r600_gpu_init(struct radeon_device *rdev)
r600_count_pipe_bits((cc_rb_backend_disable &
R6XX_MAX_BACKENDS_MASK) >> 16)),
(cc_rb_backend_disable >> 16));
rdev->config.r600.tile_config = tiling_config;
tiling_config |= BACKEND_MAP(backend_map);
WREG32(GB_TILING_CONFIG, tiling_config);
WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);