drm/radeon/kms/r6xx+: add query for tile config (v2)
Userspace needs this information to access tiled buffers via the CPU. v2: rebased on evergreen accel changes Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
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Dave Airlie

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@@ -1132,6 +1132,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
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rdev->config.evergreen.max_backends) &
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EVERGREEN_MAX_BACKENDS_MASK));
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rdev->config.evergreen.tile_config = gb_addr_config;
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WREG32(GB_BACKEND_MAP, gb_backend_map);
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WREG32(GB_ADDR_CONFIG, gb_addr_config);
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WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
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