MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@@ -202,18 +202,15 @@
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* ISA Level encodings
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*
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*/
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#define MIPS_CPU_ISA_64BIT 0x00008000
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#define MIPS_CPU_ISA_I 0x00000001
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#define MIPS_CPU_ISA_II 0x00000002
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#define MIPS_CPU_ISA_III 0x00008003
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#define MIPS_CPU_ISA_IV 0x00008004
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#define MIPS_CPU_ISA_V 0x00008005
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#define MIPS_CPU_ISA_M32 0x00000020
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#define MIPS_CPU_ISA_M64 0x00008040
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/*
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* Bit 15 encodes if an ISA level supports 64-bit operations.
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*/
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#define MIPS_CPU_ISA_64BIT 0x00008000
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#define MIPS_CPU_ISA_III (0x00000003 | MIPS_CPU_ISA_64BIT)
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#define MIPS_CPU_ISA_IV (0x00000004 | MIPS_CPU_ISA_64BIT)
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#define MIPS_CPU_ISA_V (0x00000005 | MIPS_CPU_ISA_64BIT)
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#define MIPS_CPU_ISA_M32R1 0x00000020
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#define MIPS_CPU_ISA_M64R1 (0x00000040 | MIPS_CPU_ISA_64BIT)
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/*
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* CPU Option encodings
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