gpu: ipu-v3: add support for separate alpha channels
The IPUv3 can read 8-bit alpha values from a separate IDMAC channel driven by the Alpha Transparency Controller (ATC) for the graphics IDMAC channels. This allows to reduce memory bandwidth via a conditional read mechanism or to support planar YUV formats with alpha transparency. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@@ -161,6 +161,28 @@ enum ipu_channel_irq {
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#define IPUV3_CHANNEL_MEM_BG_ASYNC_ALPHA 52
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#define IPUV3_NUM_CHANNELS 64
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static inline int ipu_channel_alpha_channel(int ch_num)
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{
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switch (ch_num) {
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case IPUV3_CHANNEL_G_MEM_IC_PRP_VF:
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return IPUV3_CHANNEL_G_MEM_IC_PRP_VF_ALPHA;
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case IPUV3_CHANNEL_G_MEM_IC_PP:
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return IPUV3_CHANNEL_G_MEM_IC_PP_ALPHA;
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case IPUV3_CHANNEL_MEM_FG_SYNC:
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return IPUV3_CHANNEL_MEM_FG_SYNC_ALPHA;
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case IPUV3_CHANNEL_MEM_FG_ASYNC:
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return IPUV3_CHANNEL_MEM_FG_ASYNC_ALPHA;
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case IPUV3_CHANNEL_MEM_BG_SYNC:
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return IPUV3_CHANNEL_MEM_BG_SYNC_ALPHA;
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case IPUV3_CHANNEL_MEM_BG_ASYNC:
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return IPUV3_CHANNEL_MEM_BG_ASYNC_ALPHA;
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case IPUV3_CHANNEL_MEM_VDI_PLANE1_COMB:
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return IPUV3_CHANNEL_MEM_VDI_PLANE1_COMB_ALPHA;
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default:
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return -EINVAL;
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}
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}
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int ipu_map_irq(struct ipu_soc *ipu, int irq);
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int ipu_idmac_channel_irq(struct ipu_soc *ipu, struct ipuv3_channel *channel,
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enum ipu_channel_irq irq);
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